189 	unsigned int u32_count, int is_write, struct omap_nand_info *info)  in omap_prefetch_enable()  argument
196 	if (readl(info->reg.gpmc_prefetch_control))  in omap_prefetch_enable()
200 	writel(u32_count, info->reg.gpmc_prefetch_config2);  in omap_prefetch_enable()
208 	writel(val, info->reg.gpmc_prefetch_config1);  in omap_prefetch_enable()
211 	writel(0x1, info->reg.gpmc_prefetch_control);  in omap_prefetch_enable()
219 static int omap_prefetch_reset(int cs, struct omap_nand_info *info)  in omap_prefetch_reset()  argument
224 	config1 = readl(info->reg.gpmc_prefetch_config1);  in omap_prefetch_reset()
229 	writel(0x0, info->reg.gpmc_prefetch_control);  in omap_prefetch_reset()
232 	writel(0x0, info->reg.gpmc_prefetch_config1);  in omap_prefetch_reset()
250 	struct omap_nand_info *info = container_of(mtd,  in omap_hwcontrol()  local
255 			writeb(cmd, info->reg.gpmc_nand_command);  in omap_hwcontrol()
258 			writeb(cmd, info->reg.gpmc_nand_address);  in omap_hwcontrol()
261 			writeb(cmd, info->reg.gpmc_nand_data);  in omap_hwcontrol()
286 	struct omap_nand_info *info = container_of(mtd,  in omap_write_buf8()  local
292 		iowrite8(*p++, info->nand.IO_ADDR_W);  in omap_write_buf8()
295 			status = readl(info->reg.gpmc_status) &  in omap_write_buf8()
322 	struct omap_nand_info *info = container_of(mtd,  in omap_write_buf16()  local
330 		iowrite16(*p++, info->nand.IO_ADDR_W);  in omap_write_buf16()
333 			status = readl(info->reg.gpmc_status) &  in omap_write_buf16()
347 	struct omap_nand_info *info = container_of(mtd,  in omap_read_buf_pref()  local
355 		if (info->nand.options & NAND_BUSWIDTH_16)  in omap_read_buf_pref()
364 	ret = omap_prefetch_enable(info->gpmc_cs,  in omap_read_buf_pref()
365 			PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x0, info);  in omap_read_buf_pref()
368 		if (info->nand.options & NAND_BUSWIDTH_16)  in omap_read_buf_pref()
374 			r_count = readl(info->reg.gpmc_prefetch_status);  in omap_read_buf_pref()
377 			ioread32_rep(info->nand.IO_ADDR_R, p, r_count);  in omap_read_buf_pref()
382 		omap_prefetch_reset(info->gpmc_cs, info);  in omap_read_buf_pref()
395 	struct omap_nand_info *info = container_of(mtd,  in omap_write_buf_pref()  local
405 		writeb(*buf, info->nand.IO_ADDR_W);  in omap_write_buf_pref()
411 	ret = omap_prefetch_enable(info->gpmc_cs,  in omap_write_buf_pref()
412 			PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x1, info);  in omap_write_buf_pref()
415 		if (info->nand.options & NAND_BUSWIDTH_16)  in omap_write_buf_pref()
421 			w_count = readl(info->reg.gpmc_prefetch_status);  in omap_write_buf_pref()
425 				iowrite16(*p++, info->nand.IO_ADDR_W);  in omap_write_buf_pref()
433 			val = readl(info->reg.gpmc_prefetch_status);  in omap_write_buf_pref()
438 		omap_prefetch_reset(info->gpmc_cs, info);  in omap_write_buf_pref()
461 	struct omap_nand_info *info = container_of(mtd,  in omap_nand_dma_transfer()  local
485 	n = dma_map_sg(info->dma->device->dev, &sg, 1, dir);  in omap_nand_dma_transfer()
487 		dev_err(&info->pdev->dev,  in omap_nand_dma_transfer()
492 	tx = dmaengine_prep_slave_sg(info->dma, &sg, n,  in omap_nand_dma_transfer()
499 	tx->callback_param = &info->comp;  in omap_nand_dma_transfer()
503 	ret = omap_prefetch_enable(info->gpmc_cs,  in omap_nand_dma_transfer()
504 		PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write, info);  in omap_nand_dma_transfer()
509 	init_completion(&info->comp);  in omap_nand_dma_transfer()
510 	dma_async_issue_pending(info->dma);  in omap_nand_dma_transfer()
513 	wait_for_completion(&info->comp);  in omap_nand_dma_transfer()
519 		val = readl(info->reg.gpmc_prefetch_status);  in omap_nand_dma_transfer()
524 	omap_prefetch_reset(info->gpmc_cs, info);  in omap_nand_dma_transfer()
526 	dma_unmap_sg(info->dma->device->dev, &sg, 1, dir);  in omap_nand_dma_transfer()
530 	dma_unmap_sg(info->dma->device->dev, &sg, 1, dir);  in omap_nand_dma_transfer()
532 	if (info->nand.options & NAND_BUSWIDTH_16)  in omap_nand_dma_transfer()
579 	struct omap_nand_info *info = (struct omap_nand_info *) dev;  in omap_nand_irq()  local
582 	bytes = readl(info->reg.gpmc_prefetch_status);  in omap_nand_irq()
585 	if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */  in omap_nand_irq()
586 		if (this_irq == info->gpmc_irq_count)  in omap_nand_irq()
589 		if (info->buf_len && (info->buf_len < bytes))  in omap_nand_irq()
590 			bytes = info->buf_len;  in omap_nand_irq()
591 		else if (!info->buf_len)  in omap_nand_irq()
593 		iowrite32_rep(info->nand.IO_ADDR_W,  in omap_nand_irq()
594 						(u32 *)info->buf, bytes >> 2);  in omap_nand_irq()
595 		info->buf = info->buf + bytes;  in omap_nand_irq()
596 		info->buf_len -= bytes;  in omap_nand_irq()
599 		ioread32_rep(info->nand.IO_ADDR_R,  in omap_nand_irq()
600 						(u32 *)info->buf, bytes >> 2);  in omap_nand_irq()
601 		info->buf = info->buf + bytes;  in omap_nand_irq()
603 		if (this_irq == info->gpmc_irq_count)  in omap_nand_irq()
610 	complete(&info->comp);  in omap_nand_irq()
612 	disable_irq_nosync(info->gpmc_irq_fifo);  in omap_nand_irq()
613 	disable_irq_nosync(info->gpmc_irq_count);  in omap_nand_irq()
626 	struct omap_nand_info *info = container_of(mtd,  in omap_read_buf_irq_pref()  local
635 	info->iomode = OMAP_NAND_IO_READ;  in omap_read_buf_irq_pref()
636 	info->buf = buf;  in omap_read_buf_irq_pref()
637 	init_completion(&info->comp);  in omap_read_buf_irq_pref()
640 	ret = omap_prefetch_enable(info->gpmc_cs,  in omap_read_buf_irq_pref()
641 			PREFETCH_FIFOTHRESHOLD_MAX/2, 0x0, len, 0x0, info);  in omap_read_buf_irq_pref()
646 	info->buf_len = len;  in omap_read_buf_irq_pref()
648 	enable_irq(info->gpmc_irq_count);  in omap_read_buf_irq_pref()
649 	enable_irq(info->gpmc_irq_fifo);  in omap_read_buf_irq_pref()
652 	wait_for_completion(&info->comp);  in omap_read_buf_irq_pref()
655 	omap_prefetch_reset(info->gpmc_cs, info);  in omap_read_buf_irq_pref()
659 	if (info->nand.options & NAND_BUSWIDTH_16)  in omap_read_buf_irq_pref()
674 	struct omap_nand_info *info = container_of(mtd,  in omap_write_buf_irq_pref()  local
685 	info->iomode = OMAP_NAND_IO_WRITE;  in omap_write_buf_irq_pref()
686 	info->buf = (u_char *) buf;  in omap_write_buf_irq_pref()
687 	init_completion(&info->comp);  in omap_write_buf_irq_pref()
690 	ret = omap_prefetch_enable(info->gpmc_cs,  in omap_write_buf_irq_pref()
691 		(PREFETCH_FIFOTHRESHOLD_MAX * 3) / 8, 0x0, len, 0x1, info);  in omap_write_buf_irq_pref()
696 	info->buf_len = len;  in omap_write_buf_irq_pref()
698 	enable_irq(info->gpmc_irq_count);  in omap_write_buf_irq_pref()
699 	enable_irq(info->gpmc_irq_fifo);  in omap_write_buf_irq_pref()
702 	wait_for_completion(&info->comp);  in omap_write_buf_irq_pref()
708 		val = readl(info->reg.gpmc_prefetch_status);  in omap_write_buf_irq_pref()
714 	omap_prefetch_reset(info->gpmc_cs, info);  in omap_write_buf_irq_pref()
718 	if (info->nand.options & NAND_BUSWIDTH_16)  in omap_write_buf_irq_pref()
889 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_correct_data()  local
895 	if ((info->nand.ecc.mode == NAND_ECC_HW) &&  in omap_correct_data()
896 			(info->nand.ecc.size  == 2048))  in omap_correct_data()
931 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_calculate_ecc()  local
935 	val = readl(info->reg.gpmc_ecc_config);  in omap_calculate_ecc()
936 	if (((val >> ECC_CONFIG_CS_SHIFT) & CS_MASK) != info->gpmc_cs)  in omap_calculate_ecc()
940 	val = readl(info->reg.gpmc_ecc1_result);  in omap_calculate_ecc()
956 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_enable_hwecc()  local
964 	writel(val, info->reg.gpmc_ecc_control);  in omap_enable_hwecc()
967 	val = ((((info->nand.ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) |  in omap_enable_hwecc()
969 	writel(val, info->reg.gpmc_ecc_size_config);  in omap_enable_hwecc()
974 		writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);  in omap_enable_hwecc()
977 		writel(ECCCLEAR, info->reg.gpmc_ecc_control);  in omap_enable_hwecc()
980 		dev_info(&info->pdev->dev,  in omap_enable_hwecc()
986 	val = (dev_width << 7) | (info->gpmc_cs << 1) | (0x1);  in omap_enable_hwecc()
987 	writel(val, info->reg.gpmc_ecc_config);  in omap_enable_hwecc()
1005 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_wait()  local
1015 	writeb(NAND_CMD_STATUS & 0xFF, info->reg.gpmc_nand_command);  in omap_wait()
1017 		status = readb(info->reg.gpmc_nand_data);  in omap_wait()
1023 	status = readb(info->reg.gpmc_nand_data);  in omap_wait()
1034 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_dev_ready()  local
1037 	val = readl(info->reg.gpmc_status);  in omap_dev_ready()
1061 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_enable_hwecc_bch()  local
1063 	enum omap_ecc ecc_opt = info->ecc_opt;  in omap_enable_hwecc_bch()
1127 	writel(ECC1, info->reg.gpmc_ecc_control);  in omap_enable_hwecc_bch()
1131 	writel(val, info->reg.gpmc_ecc_size_config);  in omap_enable_hwecc_bch()
1141 	       (info->gpmc_cs            <<  1) | /* ECC CS */  in omap_enable_hwecc_bch()
1144 	writel(val, info->reg.gpmc_ecc_config);  in omap_enable_hwecc_bch()
1147 	writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);  in omap_enable_hwecc_bch()
1165 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_calculate_ecc_bch()  local
1167 	int eccbytes	= info->nand.ecc.bytes;  in omap_calculate_ecc_bch()
1168 	struct gpmc_nand_regs	*gpmc_regs = &info->reg;  in omap_calculate_ecc_bch()
1174 	nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;  in omap_calculate_ecc_bch()
1177 		switch (info->ecc_opt) {  in omap_calculate_ecc_bch()
1251 		switch (info->ecc_opt) {  in omap_calculate_ecc_bch()
1295 		struct omap_nand_info *info)  in erased_sector_bitflips()  argument
1299 	for (i = 0; i < info->nand.ecc.size; i++) {  in erased_sector_bitflips()
1301 		if (flip_bits > info->nand.ecc.strength)  in erased_sector_bitflips()
1305 	for (i = 0; i < info->nand.ecc.bytes - 1; i++) {  in erased_sector_bitflips()
1307 		if (flip_bits > info->nand.ecc.strength)  in erased_sector_bitflips()
1316 		memset(data, 0xFF, info->nand.ecc.size);  in erased_sector_bitflips()
1317 		memset(oob, 0xFF, info->nand.ecc.bytes);  in erased_sector_bitflips()
1337 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_elm_correct_data()  local
1339 	struct nand_ecc_ctrl *ecc = &info->nand.ecc;  in omap_elm_correct_data()
1340 	int eccsteps = info->nand.ecc.steps;  in omap_elm_correct_data()
1353 	switch (info->ecc_opt) {  in omap_elm_correct_data()
1369 		dev_err(&info->pdev->dev, "invalid driver configuration\n");  in omap_elm_correct_data()
1398 				buf = &data[info->nand.ecc.size * i];  in omap_elm_correct_data()
1405 						buf, read_ecc, info);  in omap_elm_correct_data()
1435 	elm_decode_bch_error_page(info->elm_dev, ecc_vec, err_vec);  in omap_elm_correct_data()
1440 			dev_err(&info->pdev->dev,  in omap_elm_correct_data()
1445 				switch (info->ecc_opt) {  in omap_elm_correct_data()
1478 					dev_err(&info->pdev->dev,  in omap_elm_correct_data()
1588 static bool is_elm_present(struct omap_nand_info *info,  in is_elm_present()  argument
1595 		dev_err(&info->pdev->dev, "ELM devicetree node not found\n");  in is_elm_present()
1601 		dev_err(&info->pdev->dev, "ELM device not found\n");  in is_elm_present()
1605 	info->elm_dev = &pdev->dev;  in is_elm_present()
1609 static bool omap2_nand_ecc_check(struct omap_nand_info *info,  in omap2_nand_ecc_check()  argument
1614 	switch (info->ecc_opt) {  in omap2_nand_ecc_check()
1636 		dev_err(&info->pdev->dev,  in omap2_nand_ecc_check()
1641 		dev_err(&info->pdev->dev,  in omap2_nand_ecc_check()
1645 	if (ecc_needs_elm && !is_elm_present(info, pdata->elm_of_node)) {  in omap2_nand_ecc_check()
1646 		dev_err(&info->pdev->dev, "ELM not available\n");  in omap2_nand_ecc_check()
1655 	struct omap_nand_info		*info;  in omap_nand_probe()  local
1674 	info = devm_kzalloc(&pdev->dev, sizeof(struct omap_nand_info),  in omap_nand_probe()
1676 	if (!info)  in omap_nand_probe()
1679 	platform_set_drvdata(pdev, info);  in omap_nand_probe()
1681 	info->pdev		= pdev;  in omap_nand_probe()
1682 	info->gpmc_cs		= pdata->cs;  in omap_nand_probe()
1683 	info->reg		= pdata->reg;  in omap_nand_probe()
1684 	info->of_node		= pdata->of_node;  in omap_nand_probe()
1685 	info->ecc_opt		= pdata->ecc_opt;  in omap_nand_probe()
1686 	mtd			= &info->mtd;  in omap_nand_probe()
1687 	mtd->priv		= &info->nand;  in omap_nand_probe()
1689 	nand_chip		= &info->nand;  in omap_nand_probe()
1697 	info->phys_base = res->start;  in omap_nand_probe()
1727 		dev_err(&info->pdev->dev, "scan failed, may be bus-width mismatch\n");  in omap_nand_probe()
1747 		info->dma = dma_request_channel(mask, omap_dma_filter_fn, &sig);  in omap_nand_probe()
1748 		if (!info->dma) {  in omap_nand_probe()
1756 			cfg.src_addr = info->phys_base;  in omap_nand_probe()
1757 			cfg.dst_addr = info->phys_base;  in omap_nand_probe()
1762 			err = dmaengine_slave_config(info->dma, &cfg);  in omap_nand_probe()
1774 		info->gpmc_irq_fifo = platform_get_irq(pdev, 0);  in omap_nand_probe()
1775 		if (info->gpmc_irq_fifo <= 0) {  in omap_nand_probe()
1780 		err = devm_request_irq(&pdev->dev, info->gpmc_irq_fifo,  in omap_nand_probe()
1782 					"gpmc-nand-fifo", info);  in omap_nand_probe()
1785 						info->gpmc_irq_fifo, err);  in omap_nand_probe()
1786 			info->gpmc_irq_fifo = 0;  in omap_nand_probe()
1790 		info->gpmc_irq_count = platform_get_irq(pdev, 1);  in omap_nand_probe()
1791 		if (info->gpmc_irq_count <= 0) {  in omap_nand_probe()
1796 		err = devm_request_irq(&pdev->dev, info->gpmc_irq_count,  in omap_nand_probe()
1798 					"gpmc-nand-count", info);  in omap_nand_probe()
1801 						info->gpmc_irq_count, err);  in omap_nand_probe()
1802 			info->gpmc_irq_count = 0;  in omap_nand_probe()
1818 	if (!omap2_nand_ecc_check(info, pdata)) {  in omap_nand_probe()
1824 	ecclayout		= &info->oobinfo;  in omap_nand_probe()
1825 	switch (info->ecc_opt) {  in omap_nand_probe()
1882 			dev_err(&info->pdev->dev, "unable to use BCH library\n");  in omap_nand_probe()
1911 		err = elm_config(info->elm_dev, BCH4_ECC,  in omap_nand_probe()
1912 				 info->mtd.writesize / nand_chip->ecc.size,  in omap_nand_probe()
1946 			dev_err(&info->pdev->dev, "unable to use BCH library\n");  in omap_nand_probe()
1965 		err = elm_config(info->elm_dev, BCH8_ECC,  in omap_nand_probe()
1966 				 info->mtd.writesize / nand_chip->ecc.size,  in omap_nand_probe()
1995 		err = elm_config(info->elm_dev, BCH16_ECC,  in omap_nand_probe()
1996 				 info->mtd.writesize / nand_chip->ecc.size,  in omap_nand_probe()
2013 		dev_err(&info->pdev->dev, "invalid or unsupported ECC scheme\n");  in omap_nand_probe()
2018 	if (info->ecc_opt == OMAP_ECC_HAM1_CODE_SW)  in omap_nand_probe()
2025 		dev_err(&info->pdev->dev,  in omap_nand_probe()
2049 	if (info->dma)  in omap_nand_probe()
2050 		dma_release_channel(info->dma);  in omap_nand_probe()
2062 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,  in omap_nand_remove()  local
2068 	if (info->dma)  in omap_nand_remove()
2069 		dma_release_channel(info->dma);  in omap_nand_remove()