228 static void lpc32xx_nand_setup(struct lpc32xx_nand_host *host)  in lpc32xx_nand_setup()  argument
233 	writel(MLCCMD_RESET, MLC_CMD(host->io_base));  in lpc32xx_nand_setup()
237 	clkrate = clk_get_rate(host->clk);  in lpc32xx_nand_setup()
243 	writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base));  in lpc32xx_nand_setup()
247 	writel(tmp, MLC_ICR(host->io_base));  in lpc32xx_nand_setup()
251 	writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base));  in lpc32xx_nand_setup()
255 	tmp |= MLCTIMEREG_TCEA_DELAY(clkrate / host->ncfg->tcea_delay + 1);  in lpc32xx_nand_setup()
256 	tmp |= MLCTIMEREG_BUSY_DELAY(clkrate / host->ncfg->busy_delay + 1);  in lpc32xx_nand_setup()
257 	tmp |= MLCTIMEREG_NAND_TA(clkrate / host->ncfg->nand_ta + 1);  in lpc32xx_nand_setup()
258 	tmp |= MLCTIMEREG_RD_HIGH(clkrate / host->ncfg->rd_high + 1);  in lpc32xx_nand_setup()
259 	tmp |= MLCTIMEREG_RD_LOW(clkrate / host->ncfg->rd_low);  in lpc32xx_nand_setup()
260 	tmp |= MLCTIMEREG_WR_HIGH(clkrate / host->ncfg->wr_high + 1);  in lpc32xx_nand_setup()
261 	tmp |= MLCTIMEREG_WR_LOW(clkrate / host->ncfg->wr_low);  in lpc32xx_nand_setup()
262 	writel(tmp, MLC_TIME_REG(host->io_base));  in lpc32xx_nand_setup()
266 			MLC_IRQ_MR(host->io_base));  in lpc32xx_nand_setup()
269 	writel(MLCCEH_NORMAL, MLC_CEH(host->io_base));  in lpc32xx_nand_setup()
279 	struct lpc32xx_nand_host *host = nand_chip->priv;  in lpc32xx_nand_cmd_ctrl()  local
283 			writel(cmd, MLC_CMD(host->io_base));  in lpc32xx_nand_cmd_ctrl()
285 			writel(cmd, MLC_ADDR(host->io_base));  in lpc32xx_nand_cmd_ctrl()
295 	struct lpc32xx_nand_host *host = nand_chip->priv;  in lpc32xx_nand_device_ready()  local
297 	if ((readb(MLC_ISR(host->io_base)) &  in lpc32xx_nand_device_ready()
305 static irqreturn_t lpc3xxx_nand_irq(int irq, struct lpc32xx_nand_host *host)  in lpc3xxx_nand_irq()  argument
310 	sr = readb(MLC_IRQ_SR(host->io_base));  in lpc3xxx_nand_irq()
312 		complete(&host->comp_nand);  in lpc3xxx_nand_irq()
314 		complete(&host->comp_controller);  in lpc3xxx_nand_irq()
321 	struct lpc32xx_nand_host *host = chip->priv;  in lpc32xx_waitfunc_nand()  local
323 	if (readb(MLC_ISR(host->io_base)) & MLCISR_NAND_READY)  in lpc32xx_waitfunc_nand()
326 	wait_for_completion(&host->comp_nand);  in lpc32xx_waitfunc_nand()
328 	while (!(readb(MLC_ISR(host->io_base)) & MLCISR_NAND_READY)) {  in lpc32xx_waitfunc_nand()
341 	struct lpc32xx_nand_host *host = chip->priv;  in lpc32xx_waitfunc_controller()  local
343 	if (readb(MLC_ISR(host->io_base)) & MLCISR_CONTROLLER_READY)  in lpc32xx_waitfunc_controller()
346 	wait_for_completion(&host->comp_controller);  in lpc32xx_waitfunc_controller()
348 	while (!(readb(MLC_ISR(host->io_base)) &  in lpc32xx_waitfunc_controller()
369 static void lpc32xx_wp_enable(struct lpc32xx_nand_host *host)  in lpc32xx_wp_enable()  argument
371 	if (gpio_is_valid(host->ncfg->wp_gpio))  in lpc32xx_wp_enable()
372 		gpio_set_value(host->ncfg->wp_gpio, 0);  in lpc32xx_wp_enable()
378 static void lpc32xx_wp_disable(struct lpc32xx_nand_host *host)  in lpc32xx_wp_disable()  argument
380 	if (gpio_is_valid(host->ncfg->wp_gpio))  in lpc32xx_wp_disable()
381 		gpio_set_value(host->ncfg->wp_gpio, 1);  in lpc32xx_wp_disable()
393 	struct lpc32xx_nand_host *host = chip->priv;  in lpc32xx_xmit_dma()  local
398 	sg_init_one(&host->sgl, mem, len);  in lpc32xx_xmit_dma()
400 	res = dma_map_sg(host->dma_chan->device->dev, &host->sgl, 1,  in lpc32xx_xmit_dma()
406 	desc = dmaengine_prep_slave_sg(host->dma_chan, &host->sgl, 1, dir,  in lpc32xx_xmit_dma()
413 	init_completion(&host->comp_dma);  in lpc32xx_xmit_dma()
415 	desc->callback_param = &host->comp_dma;  in lpc32xx_xmit_dma()
418 	dma_async_issue_pending(host->dma_chan);  in lpc32xx_xmit_dma()
420 	wait_for_completion_timeout(&host->comp_dma, msecs_to_jiffies(1000));  in lpc32xx_xmit_dma()
422 	dma_unmap_sg(host->dma_chan->device->dev, &host->sgl, 1,  in lpc32xx_xmit_dma()
426 	dma_unmap_sg(host->dma_chan->device->dev, &host->sgl, 1,  in lpc32xx_xmit_dma()
434 	struct lpc32xx_nand_host *host = chip->priv;  in lpc32xx_read_page()  local
446 		dma_buf = host->dma_buf;  in lpc32xx_read_page()
454 	for (i = 0; i < host->mlcsubpages; i++) {  in lpc32xx_read_page()
456 		writeb(0x00, MLC_ECC_AUTO_DEC_REG(host->io_base));  in lpc32xx_read_page()
462 		mlc_isr = readl(MLC_ISR(host->io_base));  in lpc32xx_read_page()
479 					readl(MLC_BUFF(host->io_base));  in lpc32xx_read_page()
485 				readl(MLC_BUFF(host->io_base));  in lpc32xx_read_page()
501 	struct lpc32xx_nand_host *host = chip->priv;  in lpc32xx_write_page_lowlevel()  local
508 		dma_buf = host->dma_buf;  in lpc32xx_write_page_lowlevel()
512 	for (i = 0; i < host->mlcsubpages; i++) {  in lpc32xx_write_page_lowlevel()
514 		writeb(0x00, MLC_ECC_ENC_REG(host->io_base));  in lpc32xx_write_page_lowlevel()
525 				       MLC_BUFF(host->io_base));  in lpc32xx_write_page_lowlevel()
529 		writel(*((uint32_t *)(oobbuf)), MLC_BUFF(host->io_base));  in lpc32xx_write_page_lowlevel()
531 		writew(*((uint16_t *)(oobbuf)), MLC_BUFF(host->io_base));  in lpc32xx_write_page_lowlevel()
535 		writeb(0x00, MLC_ECC_AUTO_ENC_REG(host->io_base));  in lpc32xx_write_page_lowlevel()
546 	struct lpc32xx_nand_host *host = chip->priv;  in lpc32xx_read_oob()  local
549 	lpc32xx_read_page(mtd, chip, host->dummy_buf, 1, page);  in lpc32xx_read_oob()
567 static int lpc32xx_dma_setup(struct lpc32xx_nand_host *host)  in lpc32xx_dma_setup()  argument
569 	struct mtd_info *mtd = &host->mtd;  in lpc32xx_dma_setup()
572 	if (!host->pdata || !host->pdata->dma_filter) {  in lpc32xx_dma_setup()
579 	host->dma_chan = dma_request_channel(mask, host->pdata->dma_filter,  in lpc32xx_dma_setup()
581 	if (!host->dma_chan) {  in lpc32xx_dma_setup()
591 	host->dma_slave_config.direction = DMA_DEV_TO_MEM;  in lpc32xx_dma_setup()
592 	host->dma_slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in lpc32xx_dma_setup()
593 	host->dma_slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in lpc32xx_dma_setup()
594 	host->dma_slave_config.src_maxburst = 128;  in lpc32xx_dma_setup()
595 	host->dma_slave_config.dst_maxburst = 128;  in lpc32xx_dma_setup()
597 	host->dma_slave_config.device_fc = false;  in lpc32xx_dma_setup()
598 	host->dma_slave_config.src_addr = MLC_BUFF(host->io_base_phy);  in lpc32xx_dma_setup()
599 	host->dma_slave_config.dst_addr = MLC_BUFF(host->io_base_phy);  in lpc32xx_dma_setup()
600 	if (dmaengine_slave_config(host->dma_chan, &host->dma_slave_config)) {  in lpc32xx_dma_setup()
607 	dma_release_channel(host->dma_chan);  in lpc32xx_dma_setup()
645 	struct lpc32xx_nand_host *host;  in lpc32xx_nand_probe()  local
653 	host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);  in lpc32xx_nand_probe()
654 	if (!host)  in lpc32xx_nand_probe()
658 	host->io_base = devm_ioremap_resource(&pdev->dev, rc);  in lpc32xx_nand_probe()
659 	if (IS_ERR(host->io_base))  in lpc32xx_nand_probe()
660 		return PTR_ERR(host->io_base);  in lpc32xx_nand_probe()
662 	host->io_base_phy = rc->start;  in lpc32xx_nand_probe()
664 	mtd = &host->mtd;  in lpc32xx_nand_probe()
665 	nand_chip = &host->nand_chip;  in lpc32xx_nand_probe()
667 		host->ncfg = lpc32xx_parse_dt(&pdev->dev);  in lpc32xx_nand_probe()
668 	if (!host->ncfg) {  in lpc32xx_nand_probe()
673 	if (host->ncfg->wp_gpio == -EPROBE_DEFER)  in lpc32xx_nand_probe()
675 	if (gpio_is_valid(host->ncfg->wp_gpio) &&  in lpc32xx_nand_probe()
676 			gpio_request(host->ncfg->wp_gpio, "NAND WP")) {  in lpc32xx_nand_probe()
680 	lpc32xx_wp_disable(host);  in lpc32xx_nand_probe()
682 	host->pdata = dev_get_platdata(&pdev->dev);  in lpc32xx_nand_probe()
684 	nand_chip->priv = host;		/* link the private data structures */  in lpc32xx_nand_probe()
689 	host->clk = clk_get(&pdev->dev, NULL);  in lpc32xx_nand_probe()
690 	if (IS_ERR(host->clk)) {  in lpc32xx_nand_probe()
695 	clk_prepare_enable(host->clk);  in lpc32xx_nand_probe()
700 	nand_chip->IO_ADDR_R = MLC_DATA(host->io_base);  in lpc32xx_nand_probe()
701 	nand_chip->IO_ADDR_W = MLC_DATA(host->io_base);  in lpc32xx_nand_probe()
704 	lpc32xx_nand_setup(host);  in lpc32xx_nand_probe()
706 	platform_set_drvdata(pdev, host);  in lpc32xx_nand_probe()
725 		res = lpc32xx_dma_setup(host);  in lpc32xx_nand_probe()
741 	host->dma_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);  in lpc32xx_nand_probe()
742 	if (!host->dma_buf) {  in lpc32xx_nand_probe()
747 	host->dummy_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);  in lpc32xx_nand_probe()
748 	if (!host->dummy_buf) {  in lpc32xx_nand_probe()
756 	host->mlcsubpages = mtd->writesize / 512;  in lpc32xx_nand_probe()
759 	readb(MLC_IRQ_SR(host->io_base));  in lpc32xx_nand_probe()
761 	init_completion(&host->comp_nand);  in lpc32xx_nand_probe()
762 	init_completion(&host->comp_controller);  in lpc32xx_nand_probe()
764 	host->irq = platform_get_irq(pdev, 0);  in lpc32xx_nand_probe()
765 	if ((host->irq < 0) || (host->irq >= NR_IRQS)) {  in lpc32xx_nand_probe()
771 	if (request_irq(host->irq, (irq_handler_t)&lpc3xxx_nand_irq,  in lpc32xx_nand_probe()
772 			IRQF_TRIGGER_HIGH, DRV_NAME, host)) {  in lpc32xx_nand_probe()
790 	res = mtd_device_parse_register(mtd, NULL, &ppdata, host->ncfg->parts,  in lpc32xx_nand_probe()
791 					host->ncfg->num_parts);  in lpc32xx_nand_probe()
798 	free_irq(host->irq, host);  in lpc32xx_nand_probe()
801 		dma_release_channel(host->dma_chan);  in lpc32xx_nand_probe()
803 	clk_disable_unprepare(host->clk);  in lpc32xx_nand_probe()
804 	clk_put(host->clk);  in lpc32xx_nand_probe()
806 	lpc32xx_wp_enable(host);  in lpc32xx_nand_probe()
807 	gpio_free(host->ncfg->wp_gpio);  in lpc32xx_nand_probe()
817 	struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);  in lpc32xx_nand_remove()  local
818 	struct mtd_info *mtd = &host->mtd;  in lpc32xx_nand_remove()
821 	free_irq(host->irq, host);  in lpc32xx_nand_remove()
823 		dma_release_channel(host->dma_chan);  in lpc32xx_nand_remove()
825 	clk_disable_unprepare(host->clk);  in lpc32xx_nand_remove()
826 	clk_put(host->clk);  in lpc32xx_nand_remove()
828 	lpc32xx_wp_enable(host);  in lpc32xx_nand_remove()
829 	gpio_free(host->ncfg->wp_gpio);  in lpc32xx_nand_remove()
837 	struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);  in lpc32xx_nand_resume()  local
840 	clk_prepare_enable(host->clk);  in lpc32xx_nand_resume()
843 	lpc32xx_nand_setup(host);  in lpc32xx_nand_resume()
846 	lpc32xx_wp_disable(host);  in lpc32xx_nand_resume()
853 	struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);  in lpc32xx_nand_suspend()  local
856 	lpc32xx_wp_enable(host);  in lpc32xx_nand_suspend()
859 	clk_disable_unprepare(host->clk);  in lpc32xx_nand_suspend()