84 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_select_chip()  local
89 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_select_chip()
95 		banknr = nand->banks[chipnr] - 1;  in jz_nand_select_chip()
96 		chip->IO_ADDR_R = nand->bank_base[banknr];  in jz_nand_select_chip()
97 		chip->IO_ADDR_W = nand->bank_base[banknr];  in jz_nand_select_chip()
99 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_select_chip()
101 	nand->selected_bank = banknr;  in jz_nand_select_chip()
106 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_cmd_ctrl()  local
109 	void __iomem *bank_base = nand->bank_base[nand->selected_bank];  in jz_nand_cmd_ctrl()
111 	BUG_ON(nand->selected_bank < 0);  in jz_nand_cmd_ctrl()
121 		reg = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_cmd_ctrl()
123 			reg |= JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);  in jz_nand_cmd_ctrl()
125 			reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);  in jz_nand_cmd_ctrl()
126 		writel(reg, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_cmd_ctrl()
134 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_dev_ready()  local
135 	return gpiod_get_value_cansleep(nand->busy_gpio);  in jz_nand_dev_ready()
140 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_hwctl()  local
143 	writel(0, nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_hwctl()
144 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_hwctl()
153 		nand->is_reading = true;  in jz_nand_hwctl()
157 		nand->is_reading = false;  in jz_nand_hwctl()
163 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_hwctl()
169 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_calculate_ecc_rs()  local
176 	if (nand->is_reading)  in jz_nand_calculate_ecc_rs()
180 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_calculate_ecc_rs()
186 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_calculate_ecc_rs()
188 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_calculate_ecc_rs()
191 		ecc_code[i] = readb(nand->base + JZ_REG_NAND_PAR0 + i);  in jz_nand_calculate_ecc_rs()
222 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_correct_ecc_rs()  local
235 		t &= dat[nand->chip.ecc.size / 2];  in jz_nand_correct_ecc_rs()
236 		t &= dat[nand->chip.ecc.size - 1];  in jz_nand_correct_ecc_rs()
239 			for (i = 1; i < nand->chip.ecc.size - 1; ++i)  in jz_nand_correct_ecc_rs()
247 		writeb(read_ecc[i], nand->base + JZ_REG_NAND_PAR0 + i);  in jz_nand_correct_ecc_rs()
249 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
251 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
254 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_correct_ecc_rs()
260 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
262 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
271 			error = readl(nand->base + JZ_REG_NAND_ERR(i));  in jz_nand_correct_ecc_rs()
328 			       struct jz_nand *nand, unsigned char bank,  in jz_nand_detect_bank()  argument
337 	struct mtd_info *mtd = &nand->mtd;  in jz_nand_detect_bank()
338 	struct nand_chip *chip = &nand->chip;  in jz_nand_detect_bank()
354 					&nand->bank_mem[bank - 1],  in jz_nand_detect_bank()
355 					&nand->bank_base[bank - 1]);  in jz_nand_detect_bank()
361 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
363 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
399 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
401 	jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_detect_bank()
402 				 nand->bank_base[bank - 1]);  in jz_nand_detect_bank()
412 	struct jz_nand *nand;  in jz_nand_probe()  local
419 	nand = kzalloc(sizeof(*nand), GFP_KERNEL);  in jz_nand_probe()
420 	if (!nand)  in jz_nand_probe()
423 	ret = jz_nand_ioremap_resource(pdev, "mmio", &nand->mem, &nand->base);  in jz_nand_probe()
427 	nand->busy_gpio = devm_gpiod_get_optional(&pdev->dev, "busy", GPIOD_IN);  in jz_nand_probe()
428 	if (IS_ERR(nand->busy_gpio)) {  in jz_nand_probe()
429 		ret = PTR_ERR(nand->busy_gpio);  in jz_nand_probe()
435 	mtd		= &nand->mtd;  in jz_nand_probe()
436 	chip		= &nand->chip;  in jz_nand_probe()
456 	if (nand->busy_gpio)  in jz_nand_probe()
459 	platform_set_drvdata(pdev, nand);  in jz_nand_probe()
488 		nand->banks[chipnr] = bank;  in jz_nand_probe()
489 		if (jz_nand_detect_bank(pdev, nand, bank, chipnr,  in jz_nand_probe()
493 			nand->banks[chipnr] = 0;  in jz_nand_probe()
528 		unsigned char bank = nand->banks[chipnr];  in jz_nand_probe()
530 		jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_probe()
531 					 nand->bank_base[bank - 1]);  in jz_nand_probe()
533 	writel(0, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_probe()
535 	jz_nand_iounmap_resource(nand->mem, nand->base);  in jz_nand_probe()
537 	kfree(nand);  in jz_nand_probe()
543 	struct jz_nand *nand = platform_get_drvdata(pdev);  in jz_nand_remove()  local
546 	nand_release(&nand->mtd);  in jz_nand_remove()
549 	writel(0, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_remove()
552 		unsigned char bank = nand->banks[i];  in jz_nand_remove()
554 			jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_remove()
555 						 nand->bank_base[bank - 1]);  in jz_nand_remove()
560 	jz_nand_iounmap_resource(nand->mem, nand->base);  in jz_nand_remove()
562 	kfree(nand);  in jz_nand_remove()