Lines Matching refs:host

155 static inline unsigned int hinfc_read(struct hinfc_host *host, unsigned int reg)  in hinfc_read()  argument
157 return readl(host->iobase + reg); in hinfc_read()
160 static inline void hinfc_write(struct hinfc_host *host, unsigned int value, in hinfc_write() argument
163 writel(value, host->iobase + reg); in hinfc_write()
166 static void wait_controller_finished(struct hinfc_host *host) in wait_controller_finished() argument
172 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
173 if (host->command == NAND_CMD_ERASE2) { in wait_controller_finished()
177 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
187 dev_err(host->dev, "Wait NAND controller exec cmd timeout.\n"); in wait_controller_finished()
190 static void hisi_nfc_dma_transfer(struct hinfc_host *host, int todev) in hisi_nfc_dma_transfer() argument
192 struct mtd_info *mtd = &host->mtd; in hisi_nfc_dma_transfer()
197 hinfc_write(host, host->dma_buffer, HINFC504_DMA_ADDR_DATA); in hisi_nfc_dma_transfer()
198 hinfc_write(host, host->dma_oob, HINFC504_DMA_ADDR_OOB); in hisi_nfc_dma_transfer()
201 hinfc_write(host, ((mtd->oobsize & HINFC504_DMA_LEN_OOB_MASK) in hisi_nfc_dma_transfer()
204 hinfc_write(host, HINFC504_DMA_PARA_DATA_RW_EN in hisi_nfc_dma_transfer()
207 if (host->command == NAND_CMD_READOOB) in hisi_nfc_dma_transfer()
208 hinfc_write(host, HINFC504_DMA_PARA_OOB_RW_EN in hisi_nfc_dma_transfer()
212 hinfc_write(host, HINFC504_DMA_PARA_DATA_RW_EN in hisi_nfc_dma_transfer()
224 | ((host->addr_cycle == 4 ? 1 : 0) in hisi_nfc_dma_transfer()
226 | ((host->chipselect & HINFC504_DMA_CTRL_CS_MASK) in hisi_nfc_dma_transfer()
232 init_completion(&host->cmd_complete); in hisi_nfc_dma_transfer()
234 hinfc_write(host, val, HINFC504_DMA_CTRL); in hisi_nfc_dma_transfer()
235 ret = wait_for_completion_timeout(&host->cmd_complete, in hisi_nfc_dma_transfer()
239 dev_err(host->dev, "DMA operation(irq) timeout!\n"); in hisi_nfc_dma_transfer()
241 val = hinfc_read(host, HINFC504_DMA_CTRL); in hisi_nfc_dma_transfer()
243 dev_err(host->dev, "DMA is already done but without irq ACK!\n"); in hisi_nfc_dma_transfer()
245 dev_err(host->dev, "DMA is really timeout!\n"); in hisi_nfc_dma_transfer()
249 static int hisi_nfc_send_cmd_pageprog(struct hinfc_host *host) in hisi_nfc_send_cmd_pageprog() argument
251 host->addr_value[0] &= 0xffff0000; in hisi_nfc_send_cmd_pageprog()
253 hinfc_write(host, host->addr_value[0], HINFC504_ADDRL); in hisi_nfc_send_cmd_pageprog()
254 hinfc_write(host, host->addr_value[1], HINFC504_ADDRH); in hisi_nfc_send_cmd_pageprog()
255 hinfc_write(host, NAND_CMD_PAGEPROG << 8 | NAND_CMD_SEQIN, in hisi_nfc_send_cmd_pageprog()
258 hisi_nfc_dma_transfer(host, 1); in hisi_nfc_send_cmd_pageprog()
263 static int hisi_nfc_send_cmd_readstart(struct hinfc_host *host) in hisi_nfc_send_cmd_readstart() argument
265 struct mtd_info *mtd = &host->mtd; in hisi_nfc_send_cmd_readstart()
267 if ((host->addr_value[0] == host->cache_addr_value[0]) && in hisi_nfc_send_cmd_readstart()
268 (host->addr_value[1] == host->cache_addr_value[1])) in hisi_nfc_send_cmd_readstart()
271 host->addr_value[0] &= 0xffff0000; in hisi_nfc_send_cmd_readstart()
273 hinfc_write(host, host->addr_value[0], HINFC504_ADDRL); in hisi_nfc_send_cmd_readstart()
274 hinfc_write(host, host->addr_value[1], HINFC504_ADDRH); in hisi_nfc_send_cmd_readstart()
275 hinfc_write(host, NAND_CMD_READSTART << 8 | NAND_CMD_READ0, in hisi_nfc_send_cmd_readstart()
278 hinfc_write(host, 0, HINFC504_LOG_READ_ADDR); in hisi_nfc_send_cmd_readstart()
279 hinfc_write(host, mtd->writesize + mtd->oobsize, in hisi_nfc_send_cmd_readstart()
282 hisi_nfc_dma_transfer(host, 0); in hisi_nfc_send_cmd_readstart()
284 host->cache_addr_value[0] = host->addr_value[0]; in hisi_nfc_send_cmd_readstart()
285 host->cache_addr_value[1] = host->addr_value[1]; in hisi_nfc_send_cmd_readstart()
290 static int hisi_nfc_send_cmd_erase(struct hinfc_host *host) in hisi_nfc_send_cmd_erase() argument
292 hinfc_write(host, host->addr_value[0], HINFC504_ADDRL); in hisi_nfc_send_cmd_erase()
293 hinfc_write(host, (NAND_CMD_ERASE2 << 8) | NAND_CMD_ERASE1, in hisi_nfc_send_cmd_erase()
296 hinfc_write(host, HINFC504_OP_WAIT_READY_EN in hisi_nfc_send_cmd_erase()
300 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_erase()
302 | ((host->addr_cycle & HINFC504_OP_ADDR_CYCLE_MASK) in hisi_nfc_send_cmd_erase()
306 wait_controller_finished(host); in hisi_nfc_send_cmd_erase()
311 static int hisi_nfc_send_cmd_readid(struct hinfc_host *host) in hisi_nfc_send_cmd_readid() argument
313 hinfc_write(host, HINFC504_NANDINFO_LEN, HINFC504_DATA_NUM); in hisi_nfc_send_cmd_readid()
314 hinfc_write(host, NAND_CMD_READID, HINFC504_CMD); in hisi_nfc_send_cmd_readid()
315 hinfc_write(host, 0, HINFC504_ADDRL); in hisi_nfc_send_cmd_readid()
317 hinfc_write(host, HINFC504_OP_CMD1_EN | HINFC504_OP_ADDR_EN in hisi_nfc_send_cmd_readid()
319 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_readid()
323 wait_controller_finished(host); in hisi_nfc_send_cmd_readid()
328 static int hisi_nfc_send_cmd_status(struct hinfc_host *host) in hisi_nfc_send_cmd_status() argument
330 hinfc_write(host, HINFC504_NANDINFO_LEN, HINFC504_DATA_NUM); in hisi_nfc_send_cmd_status()
331 hinfc_write(host, NAND_CMD_STATUS, HINFC504_CMD); in hisi_nfc_send_cmd_status()
332 hinfc_write(host, HINFC504_OP_CMD1_EN in hisi_nfc_send_cmd_status()
334 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_status()
338 wait_controller_finished(host); in hisi_nfc_send_cmd_status()
343 static int hisi_nfc_send_cmd_reset(struct hinfc_host *host, int chipselect) in hisi_nfc_send_cmd_reset() argument
345 hinfc_write(host, NAND_CMD_RESET, HINFC504_CMD); in hisi_nfc_send_cmd_reset()
347 hinfc_write(host, HINFC504_OP_CMD1_EN in hisi_nfc_send_cmd_reset()
353 wait_controller_finished(host); in hisi_nfc_send_cmd_reset()
361 struct hinfc_host *host = chip->priv; in hisi_nfc_select_chip() local
366 host->chipselect = chipselect; in hisi_nfc_select_chip()
372 struct hinfc_host *host = chip->priv; in hisi_nfc_read_byte() local
374 if (host->command == NAND_CMD_STATUS) in hisi_nfc_read_byte()
375 return *(uint8_t *)(host->mmio); in hisi_nfc_read_byte()
377 host->offset++; in hisi_nfc_read_byte()
379 if (host->command == NAND_CMD_READID) in hisi_nfc_read_byte()
380 return *(uint8_t *)(host->mmio + host->offset - 1); in hisi_nfc_read_byte()
382 return *(uint8_t *)(host->buffer + host->offset - 1); in hisi_nfc_read_byte()
388 struct hinfc_host *host = chip->priv; in hisi_nfc_read_word() local
390 host->offset += 2; in hisi_nfc_read_word()
391 return *(u16 *)(host->buffer + host->offset - 2); in hisi_nfc_read_word()
398 struct hinfc_host *host = chip->priv; in hisi_nfc_write_buf() local
400 memcpy(host->buffer + host->offset, buf, len); in hisi_nfc_write_buf()
401 host->offset += len; in hisi_nfc_write_buf()
407 struct hinfc_host *host = chip->priv; in hisi_nfc_read_buf() local
409 memcpy(buf, host->buffer + host->offset, len); in hisi_nfc_read_buf()
410 host->offset += len; in hisi_nfc_read_buf()
416 struct hinfc_host *host = chip->priv; in set_addr() local
417 unsigned int command = host->command; in set_addr()
419 host->addr_cycle = 0; in set_addr()
420 host->addr_value[0] = 0; in set_addr()
421 host->addr_value[1] = 0; in set_addr()
430 host->addr_value[0] = column & 0xffff; in set_addr()
431 host->addr_cycle = 2; in set_addr()
434 host->addr_value[0] |= (page_addr & 0xffff) in set_addr()
435 << (host->addr_cycle * 8); in set_addr()
436 host->addr_cycle += 2; in set_addr()
439 host->addr_cycle += 1; in set_addr()
440 if (host->command == NAND_CMD_ERASE1) in set_addr()
441 host->addr_value[0] |= ((page_addr >> 16) & 0xff) << 16; in set_addr()
443 host->addr_value[1] |= ((page_addr >> 16) & 0xff); in set_addr()
452 struct hinfc_host *host = chip->priv; in hisi_nfc_cmdfunc() local
456 host->command = command; in hisi_nfc_cmdfunc()
462 host->offset = column; in hisi_nfc_cmdfunc()
464 host->offset = column + mtd->writesize; in hisi_nfc_cmdfunc()
468 hisi_nfc_send_cmd_readstart(host); in hisi_nfc_cmdfunc()
472 host->offset = column; in hisi_nfc_cmdfunc()
481 hisi_nfc_send_cmd_pageprog(host); in hisi_nfc_cmdfunc()
485 hisi_nfc_send_cmd_erase(host); in hisi_nfc_cmdfunc()
489 host->offset = column; in hisi_nfc_cmdfunc()
490 memset(host->mmio, 0, 0x10); in hisi_nfc_cmdfunc()
491 hisi_nfc_send_cmd_readid(host); in hisi_nfc_cmdfunc()
495 flag = hinfc_read(host, HINFC504_CON); in hisi_nfc_cmdfunc()
497 hinfc_write(host, in hisi_nfc_cmdfunc()
501 host->offset = 0; in hisi_nfc_cmdfunc()
502 memset(host->mmio, 0, 0x10); in hisi_nfc_cmdfunc()
503 hisi_nfc_send_cmd_status(host); in hisi_nfc_cmdfunc()
504 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_cmdfunc()
508 hisi_nfc_send_cmd_reset(host, host->chipselect); in hisi_nfc_cmdfunc()
512 dev_err(host->dev, "Error: unsupported cmd(cmd=%x, col=%x, page=%x)\n", in hisi_nfc_cmdfunc()
517 host->cache_addr_value[0] = ~0; in hisi_nfc_cmdfunc()
518 host->cache_addr_value[1] = ~0; in hisi_nfc_cmdfunc()
524 struct hinfc_host *host = devid; in hinfc_irq_handle() local
527 flag = hinfc_read(host, HINFC504_INTS); in hinfc_irq_handle()
529 host->irq_status |= flag; in hinfc_irq_handle()
532 hinfc_write(host, HINFC504_INTCLR_DMA, HINFC504_INTCLR); in hinfc_irq_handle()
533 complete(&host->cmd_complete); in hinfc_irq_handle()
535 hinfc_write(host, HINFC504_INTCLR_CE, HINFC504_INTCLR); in hinfc_irq_handle()
537 hinfc_write(host, HINFC504_INTCLR_UE, HINFC504_INTCLR); in hinfc_irq_handle()
546 struct hinfc_host *host = chip->priv; in hisi_nand_read_page_hwecc() local
554 if (host->irq_status & HINFC504_INTS_UE) { in hisi_nand_read_page_hwecc()
556 } else if (host->irq_status & HINFC504_INTS_CE) { in hisi_nand_read_page_hwecc()
560 status_ecc = hinfc_read(host, HINFC504_ECC_STATUS) >> in hisi_nand_read_page_hwecc()
570 host->irq_status = 0; in hisi_nand_read_page_hwecc()
578 struct hinfc_host *host = chip->priv; in hisi_nand_read_oob() local
583 if (host->irq_status & HINFC504_INTS_UE) { in hisi_nand_read_oob()
584 host->irq_status = 0; in hisi_nand_read_oob()
588 host->irq_status = 0; in hisi_nand_read_oob()
603 static void hisi_nfc_host_init(struct hinfc_host *host) in hisi_nfc_host_init() argument
605 struct nand_chip *chip = &host->chip; in hisi_nfc_host_init()
608 host->version = hinfc_read(host, HINFC_VERSION); in hisi_nfc_host_init()
609 host->addr_cycle = 0; in hisi_nfc_host_init()
610 host->addr_value[0] = 0; in hisi_nfc_host_init()
611 host->addr_value[1] = 0; in hisi_nfc_host_init()
612 host->cache_addr_value[0] = ~0; in hisi_nfc_host_init()
613 host->cache_addr_value[1] = ~0; in hisi_nfc_host_init()
614 host->chipselect = 0; in hisi_nfc_host_init()
624 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_host_init()
626 memset(host->mmio, 0xff, HINFC504_BUFFER_BASE_ADDRESS_LEN); in hisi_nfc_host_init()
628 hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH, in hisi_nfc_host_init()
632 hinfc_write(host, HINFC504_INTEN_DMA, HINFC504_INTEN); in hisi_nfc_host_init()
640 static int hisi_nfc_ecc_probe(struct hinfc_host *host) in hisi_nfc_ecc_probe() argument
644 struct device *dev = host->dev; in hisi_nfc_ecc_probe()
645 struct nand_chip *chip = &host->chip; in hisi_nfc_ecc_probe()
646 struct mtd_info *mtd = &host->mtd; in hisi_nfc_ecc_probe()
647 struct device_node *np = host->dev->of_node; in hisi_nfc_ecc_probe()
684 flag = hinfc_read(host, HINFC504_CON); in hisi_nfc_ecc_probe()
688 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_ecc_probe()
691 flag = hinfc_read(host, HINFC504_INTEN) & 0xfff; in hisi_nfc_ecc_probe()
692 hinfc_write(host, flag | HINFC504_INTEN_UE | HINFC504_INTEN_CE, in hisi_nfc_ecc_probe()
702 struct hinfc_host *host; in hisi_nfc_probe() local
709 host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); in hisi_nfc_probe()
710 if (!host) in hisi_nfc_probe()
712 host->dev = dev; in hisi_nfc_probe()
714 platform_set_drvdata(pdev, host); in hisi_nfc_probe()
715 chip = &host->chip; in hisi_nfc_probe()
716 mtd = &host->mtd; in hisi_nfc_probe()
726 host->iobase = devm_ioremap_resource(dev, res); in hisi_nfc_probe()
727 if (IS_ERR(host->iobase)) { in hisi_nfc_probe()
728 ret = PTR_ERR(host->iobase); in hisi_nfc_probe()
733 host->mmio = devm_ioremap_resource(dev, res); in hisi_nfc_probe()
734 if (IS_ERR(host->mmio)) { in hisi_nfc_probe()
735 ret = PTR_ERR(host->mmio); in hisi_nfc_probe()
744 chip->priv = host; in hisi_nfc_probe()
759 hisi_nfc_host_init(host); in hisi_nfc_probe()
761 ret = devm_request_irq(dev, irq, hinfc_irq_handle, 0x0, "nandc", host); in hisi_nfc_probe()
773 host->buffer = dmam_alloc_coherent(dev, mtd->writesize + mtd->oobsize, in hisi_nfc_probe()
774 &host->dma_buffer, GFP_KERNEL); in hisi_nfc_probe()
775 if (!host->buffer) { in hisi_nfc_probe()
780 host->dma_oob = host->dma_buffer + mtd->writesize; in hisi_nfc_probe()
781 memset(host->buffer, 0xff, mtd->writesize + mtd->oobsize); in hisi_nfc_probe()
783 flag = hinfc_read(host, HINFC504_CON); in hisi_nfc_probe()
797 hinfc_write(host, flag, HINFC504_CON); in hisi_nfc_probe()
800 hisi_nfc_ecc_probe(host); in hisi_nfc_probe()
825 struct hinfc_host *host = platform_get_drvdata(pdev); in hisi_nfc_remove() local
826 struct mtd_info *mtd = &host->mtd; in hisi_nfc_remove()
836 struct hinfc_host *host = dev_get_drvdata(dev); in hisi_nfc_suspend() local
840 if (((hinfc_read(host, HINFC504_STATUS) & 0x1) == 0x0) && in hisi_nfc_suspend()
841 (hinfc_read(host, HINFC504_DMA_CTRL) & in hisi_nfc_suspend()
848 dev_err(host->dev, "nand controller suspend timeout.\n"); in hisi_nfc_suspend()
856 struct hinfc_host *host = dev_get_drvdata(dev); in hisi_nfc_resume() local
857 struct nand_chip *chip = &host->chip; in hisi_nfc_resume()
860 hisi_nfc_send_cmd_reset(host, cs); in hisi_nfc_resume()
861 hinfc_write(host, SET_HINFC504_PWIDTH(HINFC504_W_LATCH, in hisi_nfc_resume()