241 	ifc_out32(page_addr, &ifc->ifc_nand.row0);  in set_addr()
242 	ifc_out32((oob ? IFC_NAND_COL_MS : 0) | column, &ifc->ifc_nand.col0);  in set_addr()
304 	ifc_out32(priv->bank << IFC_NAND_CSEL_SHIFT,  in fsl_ifc_run_command()
316 	ifc_out32(IFC_NAND_SEQ_STRT_FIR_STRT, &ifc->ifc_nand.nandseq_strt);  in fsl_ifc_run_command()
379 		ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |  in fsl_ifc_do_read()
385 		ifc_out32(0x0, &ifc->ifc_nand.nand_fir1);  in fsl_ifc_do_read()
387 		ifc_out32((NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT) |  in fsl_ifc_do_read()
391 		ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |  in fsl_ifc_do_read()
396 		ifc_out32(0x0, &ifc->ifc_nand.nand_fir1);  in fsl_ifc_do_read()
399 			ifc_out32(NAND_CMD_READOOB <<  in fsl_ifc_do_read()
403 			ifc_out32(NAND_CMD_READ0 <<  in fsl_ifc_do_read()
425 		ifc_out32(0, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_cmdfunc()
440 		ifc_out32(mtd->oobsize - column, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_cmdfunc()
456 		ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |  in fsl_ifc_cmdfunc()
460 		ifc_out32(command << IFC_NAND_FCR0_CMD0_SHIFT,  in fsl_ifc_cmdfunc()
462 		ifc_out32(column, &ifc->ifc_nand.row3);  in fsl_ifc_cmdfunc()
468 		ifc_out32(256, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_cmdfunc()
483 		ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |  in fsl_ifc_cmdfunc()
488 		ifc_out32((NAND_CMD_ERASE1 << IFC_NAND_FCR0_CMD0_SHIFT) |  in fsl_ifc_cmdfunc()
492 		ifc_out32(0, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_cmdfunc()
509 			ifc_out32(  in fsl_ifc_cmdfunc()
516 			ifc_out32(  in fsl_ifc_cmdfunc()
529 			ifc_out32(  in fsl_ifc_cmdfunc()
536 			ifc_out32(  in fsl_ifc_cmdfunc()
556 		ifc_out32(nand_fcr0, &ifc->ifc_nand.nand_fcr0);  in fsl_ifc_cmdfunc()
564 			ifc_out32(ifc_nand_ctrl->index -  in fsl_ifc_cmdfunc()
568 			ifc_out32(0, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_cmdfunc()
578 		ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |  in fsl_ifc_cmdfunc()
581 		ifc_out32(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,  in fsl_ifc_cmdfunc()
583 		ifc_out32(1, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_cmdfunc()
602 		ifc_out32(IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT,  in fsl_ifc_cmdfunc()
604 		ifc_out32(NAND_CMD_RESET << IFC_NAND_FCR0_CMD0_SHIFT,  in fsl_ifc_cmdfunc()
731 	ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |  in fsl_ifc_wait()
734 	ifc_out32(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,  in fsl_ifc_wait()
736 	ifc_out32(1, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_wait()
839 	ifc_out32(csor_8k, &ifc->csor_cs[cs].csor);  in fsl_ifc_sram_init()
840 	ifc_out32(0x0000400, &ifc->csor_cs[cs].csor_ext);  in fsl_ifc_sram_init()
843 	ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |  in fsl_ifc_sram_init()
847 	ifc_out32(NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT,  in fsl_ifc_sram_init()
849 	ifc_out32(0x0, &ifc->ifc_nand.row3);  in fsl_ifc_sram_init()
851 	ifc_out32(0x0, &ifc->ifc_nand.nand_fbcr);  in fsl_ifc_sram_init()
854 	ifc_out32(0x0, &ifc->ifc_nand.row0);  in fsl_ifc_sram_init()
855 	ifc_out32(0x0, &ifc->ifc_nand.col0);  in fsl_ifc_sram_init()
858 	ifc_out32(cs << IFC_NAND_CSEL_SHIFT, &ifc->ifc_nand.nand_csel);  in fsl_ifc_sram_init()
861 	ifc_out32(IFC_NAND_SEQ_STRT_FIR_STRT, &ifc->ifc_nand.nandseq_strt);  in fsl_ifc_sram_init()
871 	ifc_out32(csor, &ifc->csor_cs[cs].csor);  in fsl_ifc_sram_init()
872 	ifc_out32(csor_ext, &ifc->csor_cs[cs].csor_ext);  in fsl_ifc_sram_init()
903 	ifc_out32(0x0, &ifc->ifc_nand.ncfgr);  in fsl_ifc_chip_init()
1097 	ifc_out32(IFC_NAND_EVTER_EN_OPC_EN |  in fsl_ifc_nand_probe()
1103 	ifc_out32(IFC_NAND_EVTER_INTR_OPCIR_EN |  in fsl_ifc_nand_probe()