Lines Matching refs:ctrl
190 struct brcmnand_controller *ctrl; member
410 static inline u32 nand_readreg(struct brcmnand_controller *ctrl, u32 offs) in nand_readreg() argument
412 return brcmnand_readl(ctrl->nand_base + offs); in nand_readreg()
415 static inline void nand_writereg(struct brcmnand_controller *ctrl, u32 offs, in nand_writereg() argument
418 brcmnand_writel(val, ctrl->nand_base + offs); in nand_writereg()
421 static int brcmnand_revision_init(struct brcmnand_controller *ctrl) in brcmnand_revision_init() argument
427 ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff; in brcmnand_revision_init()
430 if (ctrl->nand_version < 0x0400) { in brcmnand_revision_init()
431 dev_err(ctrl->dev, "version %#x not supported\n", in brcmnand_revision_init()
432 ctrl->nand_version); in brcmnand_revision_init()
437 if (ctrl->nand_version >= 0x0701) in brcmnand_revision_init()
438 ctrl->reg_offsets = brcmnand_regs_v71; in brcmnand_revision_init()
439 else if (ctrl->nand_version >= 0x0600) in brcmnand_revision_init()
440 ctrl->reg_offsets = brcmnand_regs_v60; in brcmnand_revision_init()
441 else if (ctrl->nand_version >= 0x0500) in brcmnand_revision_init()
442 ctrl->reg_offsets = brcmnand_regs_v50; in brcmnand_revision_init()
443 else if (ctrl->nand_version >= 0x0400) in brcmnand_revision_init()
444 ctrl->reg_offsets = brcmnand_regs_v40; in brcmnand_revision_init()
447 if (ctrl->nand_version >= 0x0701) in brcmnand_revision_init()
448 ctrl->reg_spacing = 0x14; in brcmnand_revision_init()
450 ctrl->reg_spacing = 0x10; in brcmnand_revision_init()
453 if (ctrl->nand_version >= 0x0701) { in brcmnand_revision_init()
454 ctrl->cs_offsets = brcmnand_cs_offsets_v71; in brcmnand_revision_init()
456 ctrl->cs_offsets = brcmnand_cs_offsets; in brcmnand_revision_init()
459 if (ctrl->nand_version <= 0x0500) in brcmnand_revision_init()
460 ctrl->cs0_offsets = brcmnand_cs_offsets_cs0; in brcmnand_revision_init()
464 if (ctrl->nand_version >= 0x0701) { in brcmnand_revision_init()
466 ctrl->max_page_size = 16 * 1024; in brcmnand_revision_init()
467 ctrl->max_block_size = 2 * 1024 * 1024; in brcmnand_revision_init()
469 ctrl->page_sizes = page_sizes; in brcmnand_revision_init()
470 if (ctrl->nand_version >= 0x0600) in brcmnand_revision_init()
471 ctrl->block_sizes = block_sizes_v6; in brcmnand_revision_init()
473 ctrl->block_sizes = block_sizes_v4; in brcmnand_revision_init()
475 if (ctrl->nand_version < 0x0400) { in brcmnand_revision_init()
476 ctrl->max_page_size = 4096; in brcmnand_revision_init()
477 ctrl->max_block_size = 512 * 1024; in brcmnand_revision_init()
482 if (ctrl->nand_version >= 0x0600) in brcmnand_revision_init()
483 ctrl->max_oob = 64; in brcmnand_revision_init()
484 else if (ctrl->nand_version >= 0x0500) in brcmnand_revision_init()
485 ctrl->max_oob = 32; in brcmnand_revision_init()
487 ctrl->max_oob = 16; in brcmnand_revision_init()
490 if (ctrl->nand_version >= 0x0600 && ctrl->nand_version != 0x0601) in brcmnand_revision_init()
491 ctrl->features |= BRCMNAND_HAS_PREFETCH; in brcmnand_revision_init()
497 if (ctrl->nand_version >= 0x0700) in brcmnand_revision_init()
498 ctrl->features |= BRCMNAND_HAS_CACHE_MODE; in brcmnand_revision_init()
500 if (ctrl->nand_version >= 0x0500) in brcmnand_revision_init()
501 ctrl->features |= BRCMNAND_HAS_1K_SECTORS; in brcmnand_revision_init()
503 if (ctrl->nand_version >= 0x0700) in brcmnand_revision_init()
504 ctrl->features |= BRCMNAND_HAS_WP; in brcmnand_revision_init()
505 else if (of_property_read_bool(ctrl->dev->of_node, "brcm,nand-has-wp")) in brcmnand_revision_init()
506 ctrl->features |= BRCMNAND_HAS_WP; in brcmnand_revision_init()
511 static inline u32 brcmnand_read_reg(struct brcmnand_controller *ctrl, in brcmnand_read_reg() argument
514 u16 offs = ctrl->reg_offsets[reg]; in brcmnand_read_reg()
517 return nand_readreg(ctrl, offs); in brcmnand_read_reg()
522 static inline void brcmnand_write_reg(struct brcmnand_controller *ctrl, in brcmnand_write_reg() argument
525 u16 offs = ctrl->reg_offsets[reg]; in brcmnand_write_reg()
528 nand_writereg(ctrl, offs, val); in brcmnand_write_reg()
531 static inline void brcmnand_rmw_reg(struct brcmnand_controller *ctrl, in brcmnand_rmw_reg() argument
535 u32 tmp = brcmnand_read_reg(ctrl, reg); in brcmnand_rmw_reg()
539 brcmnand_write_reg(ctrl, reg, tmp); in brcmnand_rmw_reg()
542 static inline u32 brcmnand_read_fc(struct brcmnand_controller *ctrl, int word) in brcmnand_read_fc() argument
544 return __raw_readl(ctrl->nand_fc + word * 4); in brcmnand_read_fc()
547 static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl, in brcmnand_write_fc() argument
550 __raw_writel(val, ctrl->nand_fc + word * 4); in brcmnand_write_fc()
553 static inline u16 brcmnand_cs_offset(struct brcmnand_controller *ctrl, int cs, in brcmnand_cs_offset() argument
556 u16 offs_cs0 = ctrl->reg_offsets[BRCMNAND_CS0_BASE]; in brcmnand_cs_offset()
557 u16 offs_cs1 = ctrl->reg_offsets[BRCMNAND_CS1_BASE]; in brcmnand_cs_offset()
560 if (cs == 0 && ctrl->cs0_offsets) in brcmnand_cs_offset()
561 cs_offs = ctrl->cs0_offsets[reg]; in brcmnand_cs_offset()
563 cs_offs = ctrl->cs_offsets[reg]; in brcmnand_cs_offset()
566 return offs_cs1 + (cs - 1) * ctrl->reg_spacing + cs_offs; in brcmnand_cs_offset()
568 return offs_cs0 + cs * ctrl->reg_spacing + cs_offs; in brcmnand_cs_offset()
571 static inline u32 brcmnand_count_corrected(struct brcmnand_controller *ctrl) in brcmnand_count_corrected() argument
573 if (ctrl->nand_version < 0x0600) in brcmnand_count_corrected()
575 return brcmnand_read_reg(ctrl, BRCMNAND_CORR_COUNT); in brcmnand_count_corrected()
580 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_wr_corr_thresh() local
585 if (ctrl->nand_version >= 0x0600) in brcmnand_wr_corr_thresh()
587 else if (ctrl->nand_version >= 0x0500) in brcmnand_wr_corr_thresh()
592 if (ctrl->nand_version >= 0x0600) { in brcmnand_wr_corr_thresh()
597 brcmnand_rmw_reg(ctrl, reg, (bits - 1) << shift, shift, val); in brcmnand_wr_corr_thresh()
600 static inline int brcmnand_cmd_shift(struct brcmnand_controller *ctrl) in brcmnand_cmd_shift() argument
602 if (ctrl->nand_version < 0x0700) in brcmnand_cmd_shift()
631 static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl) in brcmnand_spare_area_mask() argument
633 if (ctrl->nand_version >= 0x0600) in brcmnand_spare_area_mask()
641 static inline u32 brcmnand_ecc_level_mask(struct brcmnand_controller *ctrl) in brcmnand_ecc_level_mask() argument
643 u32 mask = (ctrl->nand_version >= 0x0600) ? 0x1f : 0x0f; in brcmnand_ecc_level_mask()
650 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_set_ecc_enabled() local
651 u16 offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_ACC_CONTROL); in brcmnand_set_ecc_enabled()
652 u32 acc_control = nand_readreg(ctrl, offs); in brcmnand_set_ecc_enabled()
661 acc_control &= ~brcmnand_ecc_level_mask(ctrl); in brcmnand_set_ecc_enabled()
664 nand_writereg(ctrl, offs, acc_control); in brcmnand_set_ecc_enabled()
667 static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl) in brcmnand_sector_1k_shift() argument
669 if (ctrl->nand_version >= 0x0600) in brcmnand_sector_1k_shift()
671 else if (ctrl->nand_version >= 0x0500) in brcmnand_sector_1k_shift()
679 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_get_sector_size_1k() local
680 int shift = brcmnand_sector_1k_shift(ctrl); in brcmnand_get_sector_size_1k()
681 u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, in brcmnand_get_sector_size_1k()
687 return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1; in brcmnand_get_sector_size_1k()
692 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_set_sector_size_1k() local
693 int shift = brcmnand_sector_1k_shift(ctrl); in brcmnand_set_sector_size_1k()
694 u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, in brcmnand_set_sector_size_1k()
701 tmp = nand_readreg(ctrl, acc_control_offs); in brcmnand_set_sector_size_1k()
704 nand_writereg(ctrl, acc_control_offs, tmp); in brcmnand_set_sector_size_1k()
716 static inline void brcmnand_set_wp(struct brcmnand_controller *ctrl, bool en) in brcmnand_set_wp() argument
720 brcmnand_rmw_reg(ctrl, BRCMNAND_CS_SELECT, CS_SELECT_NAND_WP, 0, val); in brcmnand_set_wp()
741 static inline bool has_flash_dma(struct brcmnand_controller *ctrl) in has_flash_dma() argument
743 return ctrl->flash_dma_base; in has_flash_dma()
752 static inline void flash_dma_writel(struct brcmnand_controller *ctrl, u8 offs, in flash_dma_writel() argument
755 brcmnand_writel(val, ctrl->flash_dma_base + offs); in flash_dma_writel()
758 static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, u8 offs) in flash_dma_readl() argument
760 return brcmnand_readl(ctrl->flash_dma_base + offs); in flash_dma_readl()
911 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_wp() local
913 if ((ctrl->features & BRCMNAND_HAS_WP) && wp_on == 1) { in brcmnand_wp()
917 dev_dbg(ctrl->dev, "WP %s\n", wp ? "on" : "off"); in brcmnand_wp()
920 brcmnand_set_wp(ctrl, wp); in brcmnand_wp()
925 static inline u8 oob_reg_read(struct brcmnand_controller *ctrl, u32 offs) in oob_reg_read() argument
929 offset0 = ctrl->reg_offsets[BRCMNAND_OOB_READ_BASE]; in oob_reg_read()
930 offset10 = ctrl->reg_offsets[BRCMNAND_OOB_READ_10_BASE]; in oob_reg_read()
932 if (offs >= ctrl->max_oob) in oob_reg_read()
940 return nand_readreg(ctrl, reg_offs) >> (24 - ((offs & 0x03) << 3)); in oob_reg_read()
943 static inline void oob_reg_write(struct brcmnand_controller *ctrl, u32 offs, in oob_reg_write() argument
948 offset0 = ctrl->reg_offsets[BRCMNAND_OOB_WRITE_BASE]; in oob_reg_write()
949 offset10 = ctrl->reg_offsets[BRCMNAND_OOB_WRITE_10_BASE]; in oob_reg_write()
951 if (offs >= ctrl->max_oob) in oob_reg_write()
959 nand_writereg(ctrl, reg_offs, data); in oob_reg_write()
970 static int read_oob_from_regs(struct brcmnand_controller *ctrl, int i, u8 *oob, in read_oob_from_regs() argument
978 tbytes = max(0, tbytes - (int)ctrl->max_oob); in read_oob_from_regs()
979 tbytes = min_t(int, tbytes, ctrl->max_oob); in read_oob_from_regs()
982 oob[j] = oob_reg_read(ctrl, j); in read_oob_from_regs()
993 static int write_oob_to_regs(struct brcmnand_controller *ctrl, int i, in write_oob_to_regs() argument
1001 tbytes = max(0, tbytes - (int)ctrl->max_oob); in write_oob_to_regs()
1002 tbytes = min_t(int, tbytes, ctrl->max_oob); in write_oob_to_regs()
1005 oob_reg_write(ctrl, j, in write_oob_to_regs()
1015 struct brcmnand_controller *ctrl = data; in brcmnand_ctlrdy_irq() local
1018 if (ctrl->dma_pending) in brcmnand_ctlrdy_irq()
1021 complete(&ctrl->done); in brcmnand_ctlrdy_irq()
1028 struct brcmnand_controller *ctrl = data; in brcmnand_irq() local
1030 if (ctrl->soc->ctlrdy_ack(ctrl->soc)) in brcmnand_irq()
1038 struct brcmnand_controller *ctrl = data; in brcmnand_dma_irq() local
1040 complete(&ctrl->dma_done); in brcmnand_dma_irq()
1047 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_send_cmd() local
1050 dev_dbg(ctrl->dev, "send native cmd %d addr_lo 0x%x\n", cmd, in brcmnand_send_cmd()
1051 brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS)); in brcmnand_send_cmd()
1052 BUG_ON(ctrl->cmd_pending != 0); in brcmnand_send_cmd()
1053 ctrl->cmd_pending = cmd; in brcmnand_send_cmd()
1055 intfc = brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS); in brcmnand_send_cmd()
1059 brcmnand_write_reg(ctrl, BRCMNAND_CMD_START, in brcmnand_send_cmd()
1060 cmd << brcmnand_cmd_shift(ctrl)); in brcmnand_send_cmd()
1068 unsigned int ctrl) in brcmnand_cmd_ctrl() argument
1077 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_waitfunc() local
1080 dev_dbg(ctrl->dev, "wait on native cmd %d\n", ctrl->cmd_pending); in brcmnand_waitfunc()
1081 if (ctrl->cmd_pending && in brcmnand_waitfunc()
1082 wait_for_completion_timeout(&ctrl->done, timeo) <= 0) { in brcmnand_waitfunc()
1083 u32 cmd = brcmnand_read_reg(ctrl, BRCMNAND_CMD_START) in brcmnand_waitfunc()
1084 >> brcmnand_cmd_shift(ctrl); in brcmnand_waitfunc()
1086 dev_err_ratelimited(ctrl->dev, in brcmnand_waitfunc()
1088 dev_err_ratelimited(ctrl->dev, "intfc status %08x\n", in brcmnand_waitfunc()
1089 brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS)); in brcmnand_waitfunc()
1091 ctrl->cmd_pending = 0; in brcmnand_waitfunc()
1092 return brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS) & in brcmnand_waitfunc()
1112 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_low_level_op() local
1137 dev_dbg(ctrl->dev, "ll_op cmd %#x\n", tmp); in brcmnand_low_level_op()
1139 brcmnand_write_reg(ctrl, BRCMNAND_LL_OP, tmp); in brcmnand_low_level_op()
1140 (void)brcmnand_read_reg(ctrl, BRCMNAND_LL_OP); in brcmnand_low_level_op()
1151 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_cmdfunc() local
1162 dev_dbg(ctrl->dev, "cmd 0x%x addr 0x%llx\n", command, in brcmnand_cmdfunc()
1212 brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, in brcmnand_cmdfunc()
1214 (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); in brcmnand_cmdfunc()
1215 brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, lower_32_bits(addr)); in brcmnand_cmdfunc()
1216 (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); in brcmnand_cmdfunc()
1225 brcmnand_soc_data_bus_prepare(ctrl->soc); in brcmnand_cmdfunc()
1232 ctrl->flash_cache[i] = brcmnand_read_fc(ctrl, i); in brcmnand_cmdfunc()
1234 brcmnand_soc_data_bus_unprepare(ctrl->soc); in brcmnand_cmdfunc()
1251 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_read_byte() local
1258 ret = brcmnand_read_reg(ctrl, BRCMNAND_ID) >> in brcmnand_read_byte()
1261 ret = brcmnand_read_reg(ctrl, BRCMNAND_ID_EXT) >> in brcmnand_read_byte()
1266 ret = oob_reg_read(ctrl, host->last_byte); in brcmnand_read_byte()
1270 ret = brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS) & in brcmnand_read_byte()
1285 ret = ctrl->flash_cache[offs >> 2] >> in brcmnand_read_byte()
1295 ret = brcmnand_read_reg(ctrl, BRCMNAND_LL_RDATA) & 0xff; in brcmnand_read_byte()
1299 dev_dbg(ctrl->dev, "read byte = 0x%02x\n", ret); in brcmnand_read_byte()
1370 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_dma_run() local
1373 flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc)); in brcmnand_dma_run()
1374 (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC); in brcmnand_dma_run()
1375 flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc)); in brcmnand_dma_run()
1376 (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT); in brcmnand_dma_run()
1379 ctrl->dma_pending = true; in brcmnand_dma_run()
1381 flash_dma_writel(ctrl, FLASH_DMA_CTRL, 0x03); /* wake | run */ in brcmnand_dma_run()
1383 if (wait_for_completion_timeout(&ctrl->dma_done, timeo) <= 0) { in brcmnand_dma_run()
1384 dev_err(ctrl->dev, in brcmnand_dma_run()
1386 flash_dma_readl(ctrl, FLASH_DMA_STATUS), in brcmnand_dma_run()
1387 flash_dma_readl(ctrl, FLASH_DMA_ERROR_STATUS)); in brcmnand_dma_run()
1389 ctrl->dma_pending = false; in brcmnand_dma_run()
1390 flash_dma_writel(ctrl, FLASH_DMA_CTRL, 0); /* force stop */ in brcmnand_dma_run()
1396 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_dma_trans() local
1400 buf_pa = dma_map_single(ctrl->dev, buf, len, dir); in brcmnand_dma_trans()
1401 if (dma_mapping_error(ctrl->dev, buf_pa)) { in brcmnand_dma_trans()
1402 dev_err(ctrl->dev, "unable to map buffer for DMA\n"); in brcmnand_dma_trans()
1406 brcmnand_fill_dma_desc(host, ctrl->dma_desc, addr, buf_pa, len, in brcmnand_dma_trans()
1409 brcmnand_dma_run(host, ctrl->dma_pa); in brcmnand_dma_trans()
1411 dma_unmap_single(ctrl->dev, buf_pa, len, dir); in brcmnand_dma_trans()
1413 if (ctrl->dma_desc->status_valid & FLASH_DMA_ECC_ERROR) in brcmnand_dma_trans()
1415 else if (ctrl->dma_desc->status_valid & FLASH_DMA_CORR_ERROR) in brcmnand_dma_trans()
1429 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_read_by_pio() local
1433 brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0); in brcmnand_read_by_pio()
1434 brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0); in brcmnand_read_by_pio()
1436 brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, in brcmnand_read_by_pio()
1438 (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); in brcmnand_read_by_pio()
1441 brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, in brcmnand_read_by_pio()
1443 (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); in brcmnand_read_by_pio()
1449 brcmnand_soc_data_bus_prepare(ctrl->soc); in brcmnand_read_by_pio()
1452 *buf = brcmnand_read_fc(ctrl, j); in brcmnand_read_by_pio()
1454 brcmnand_soc_data_bus_unprepare(ctrl->soc); in brcmnand_read_by_pio()
1458 oob += read_oob_from_regs(ctrl, i, oob, in brcmnand_read_by_pio()
1463 *err_addr = brcmnand_read_reg(ctrl, in brcmnand_read_by_pio()
1465 ((u64)(brcmnand_read_reg(ctrl, in brcmnand_read_by_pio()
1473 *err_addr = brcmnand_read_reg(ctrl, in brcmnand_read_by_pio()
1475 ((u64)(brcmnand_read_reg(ctrl, in brcmnand_read_by_pio()
1490 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_read() local
1494 dev_dbg(ctrl->dev, "read %llx -> %p\n", (unsigned long long)addr, buf); in brcmnand_read()
1496 brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_COUNT, 0); in brcmnand_read()
1498 if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) { in brcmnand_read()
1516 dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n", in brcmnand_read()
1524 unsigned int corrected = brcmnand_count_corrected(ctrl); in brcmnand_read()
1526 dev_dbg(ctrl->dev, "corrected error at 0x%llx\n", in brcmnand_read()
1595 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_write() local
1599 dev_dbg(ctrl->dev, "write %llx <- %p\n", (unsigned long long)addr, buf); in brcmnand_write()
1602 dev_warn(ctrl->dev, "unaligned buffer: %p\n", buf); in brcmnand_write()
1608 for (i = 0; i < ctrl->max_oob; i += 4) in brcmnand_write()
1609 oob_reg_write(ctrl, i, 0xffffffff); in brcmnand_write()
1611 if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) { in brcmnand_write()
1618 brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, in brcmnand_write()
1620 (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); in brcmnand_write()
1624 brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, in brcmnand_write()
1626 (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); in brcmnand_write()
1629 brcmnand_soc_data_bus_prepare(ctrl->soc); in brcmnand_write()
1632 brcmnand_write_fc(ctrl, j, *buf); in brcmnand_write()
1634 brcmnand_soc_data_bus_unprepare(ctrl->soc); in brcmnand_write()
1637 brcmnand_write_fc(ctrl, j, 0xffffffff); in brcmnand_write()
1641 oob += write_oob_to_regs(ctrl, i, oob, in brcmnand_write()
1651 dev_info(ctrl->dev, "program failed at %llx\n", in brcmnand_write()
1713 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_set_cfg() local
1715 u16 cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG); in brcmnand_set_cfg()
1716 u16 cfg_ext_offs = brcmnand_cs_offset(ctrl, host->cs, in brcmnand_set_cfg()
1718 u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, in brcmnand_set_cfg()
1723 if (ctrl->block_sizes) { in brcmnand_set_cfg()
1726 for (i = 0, found = 0; ctrl->block_sizes[i]; i++) in brcmnand_set_cfg()
1727 if (ctrl->block_sizes[i] * 1024 == cfg->block_size) { in brcmnand_set_cfg()
1732 dev_warn(ctrl->dev, "invalid block size %u\n", in brcmnand_set_cfg()
1740 if (cfg->block_size < BRCMNAND_MIN_BLOCKSIZE || (ctrl->max_block_size && in brcmnand_set_cfg()
1741 cfg->block_size > ctrl->max_block_size)) { in brcmnand_set_cfg()
1742 dev_warn(ctrl->dev, "invalid block size %u\n", in brcmnand_set_cfg()
1747 if (ctrl->page_sizes) { in brcmnand_set_cfg()
1750 for (i = 0, found = 0; ctrl->page_sizes[i]; i++) in brcmnand_set_cfg()
1751 if (ctrl->page_sizes[i] == cfg->page_size) { in brcmnand_set_cfg()
1756 dev_warn(ctrl->dev, "invalid page size %u\n", in brcmnand_set_cfg()
1764 if (cfg->page_size < BRCMNAND_MIN_PAGESIZE || (ctrl->max_page_size && in brcmnand_set_cfg()
1765 cfg->page_size > ctrl->max_page_size)) { in brcmnand_set_cfg()
1766 dev_warn(ctrl->dev, "invalid page size %u\n", cfg->page_size); in brcmnand_set_cfg()
1771 dev_warn(ctrl->dev, "invalid device size 0x%llx\n", in brcmnand_set_cfg()
1785 nand_writereg(ctrl, cfg_offs, tmp); in brcmnand_set_cfg()
1787 nand_writereg(ctrl, cfg_offs, tmp); in brcmnand_set_cfg()
1790 nand_writereg(ctrl, cfg_ext_offs, tmp); in brcmnand_set_cfg()
1793 tmp = nand_readreg(ctrl, acc_control_offs); in brcmnand_set_cfg()
1794 tmp &= ~brcmnand_ecc_level_mask(ctrl); in brcmnand_set_cfg()
1796 tmp &= ~brcmnand_spare_area_mask(ctrl); in brcmnand_set_cfg()
1798 nand_writereg(ctrl, acc_control_offs, tmp); in brcmnand_set_cfg()
1843 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_setup_dev() local
1861 if (cfg->spare_area_size > ctrl->max_oob) in brcmnand_setup_dev()
1862 cfg->spare_area_size = ctrl->max_oob; in brcmnand_setup_dev()
1885 if (!(ctrl->features & BRCMNAND_HAS_1K_SECTORS)) { in brcmnand_setup_dev()
1886 dev_err(ctrl->dev, "1KB sectors not supported\n"); in brcmnand_setup_dev()
1890 dev_err(ctrl->dev, in brcmnand_setup_dev()
1899 dev_err(ctrl->dev, "unsupported ECC size: %d\n", in brcmnand_setup_dev()
1917 dev_info(ctrl->dev, "detected %s\n", msg); in brcmnand_setup_dev()
1920 offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_ACC_CONTROL); in brcmnand_setup_dev()
1921 tmp = nand_readreg(ctrl, offs); in brcmnand_setup_dev()
1925 if (ctrl->features & BRCMNAND_HAS_PREFETCH) { in brcmnand_setup_dev()
1930 if (has_flash_dma(ctrl)) in brcmnand_setup_dev()
1935 nand_writereg(ctrl, offs, tmp); in brcmnand_setup_dev()
1942 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_init_cs() local
1989 chip->controller = &ctrl->controller; in brcmnand_init_cs()
1996 cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG); in brcmnand_init_cs()
1997 nand_writereg(ctrl, cfg_offs, in brcmnand_init_cs()
1998 nand_readreg(ctrl, cfg_offs) & ~CFG_BUS_WIDTH); in brcmnand_init_cs()
2034 struct brcmnand_controller *ctrl = host->ctrl; in brcmnand_save_restore_cs_config() local
2035 u16 cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG); in brcmnand_save_restore_cs_config()
2036 u16 cfg_ext_offs = brcmnand_cs_offset(ctrl, host->cs, in brcmnand_save_restore_cs_config()
2038 u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, in brcmnand_save_restore_cs_config()
2040 u16 t1_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_TIMING1); in brcmnand_save_restore_cs_config()
2041 u16 t2_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_TIMING2); in brcmnand_save_restore_cs_config()
2044 nand_writereg(ctrl, cfg_offs, host->hwcfg.config); in brcmnand_save_restore_cs_config()
2046 nand_writereg(ctrl, cfg_ext_offs, in brcmnand_save_restore_cs_config()
2048 nand_writereg(ctrl, acc_control_offs, host->hwcfg.acc_control); in brcmnand_save_restore_cs_config()
2049 nand_writereg(ctrl, t1_offs, host->hwcfg.timing_1); in brcmnand_save_restore_cs_config()
2050 nand_writereg(ctrl, t2_offs, host->hwcfg.timing_2); in brcmnand_save_restore_cs_config()
2052 host->hwcfg.config = nand_readreg(ctrl, cfg_offs); in brcmnand_save_restore_cs_config()
2055 nand_readreg(ctrl, cfg_ext_offs); in brcmnand_save_restore_cs_config()
2056 host->hwcfg.acc_control = nand_readreg(ctrl, acc_control_offs); in brcmnand_save_restore_cs_config()
2057 host->hwcfg.timing_1 = nand_readreg(ctrl, t1_offs); in brcmnand_save_restore_cs_config()
2058 host->hwcfg.timing_2 = nand_readreg(ctrl, t2_offs); in brcmnand_save_restore_cs_config()
2064 struct brcmnand_controller *ctrl = dev_get_drvdata(dev); in brcmnand_suspend() local
2067 list_for_each_entry(host, &ctrl->host_list, node) in brcmnand_suspend()
2070 ctrl->nand_cs_nand_select = brcmnand_read_reg(ctrl, BRCMNAND_CS_SELECT); in brcmnand_suspend()
2071 ctrl->nand_cs_nand_xor = brcmnand_read_reg(ctrl, BRCMNAND_CS_XOR); in brcmnand_suspend()
2072 ctrl->corr_stat_threshold = in brcmnand_suspend()
2073 brcmnand_read_reg(ctrl, BRCMNAND_CORR_THRESHOLD); in brcmnand_suspend()
2075 if (has_flash_dma(ctrl)) in brcmnand_suspend()
2076 ctrl->flash_dma_mode = flash_dma_readl(ctrl, FLASH_DMA_MODE); in brcmnand_suspend()
2083 struct brcmnand_controller *ctrl = dev_get_drvdata(dev); in brcmnand_resume() local
2086 if (has_flash_dma(ctrl)) { in brcmnand_resume()
2087 flash_dma_writel(ctrl, FLASH_DMA_MODE, ctrl->flash_dma_mode); in brcmnand_resume()
2088 flash_dma_writel(ctrl, FLASH_DMA_ERROR_STATUS, 0); in brcmnand_resume()
2091 brcmnand_write_reg(ctrl, BRCMNAND_CS_SELECT, ctrl->nand_cs_nand_select); in brcmnand_resume()
2092 brcmnand_write_reg(ctrl, BRCMNAND_CS_XOR, ctrl->nand_cs_nand_xor); in brcmnand_resume()
2093 brcmnand_write_reg(ctrl, BRCMNAND_CORR_THRESHOLD, in brcmnand_resume()
2094 ctrl->corr_stat_threshold); in brcmnand_resume()
2095 if (ctrl->soc) { in brcmnand_resume()
2097 ctrl->soc->ctlrdy_ack(ctrl->soc); in brcmnand_resume()
2098 ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); in brcmnand_resume()
2101 list_for_each_entry(host, &ctrl->host_list, node) { in brcmnand_resume()
2139 struct brcmnand_controller *ctrl; in brcmnand_probe() local
2150 ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); in brcmnand_probe()
2151 if (!ctrl) in brcmnand_probe()
2154 dev_set_drvdata(dev, ctrl); in brcmnand_probe()
2155 ctrl->dev = dev; in brcmnand_probe()
2157 init_completion(&ctrl->done); in brcmnand_probe()
2158 init_completion(&ctrl->dma_done); in brcmnand_probe()
2159 spin_lock_init(&ctrl->controller.lock); in brcmnand_probe()
2160 init_waitqueue_head(&ctrl->controller.wq); in brcmnand_probe()
2161 INIT_LIST_HEAD(&ctrl->host_list); in brcmnand_probe()
2165 ctrl->nand_base = devm_ioremap_resource(dev, res); in brcmnand_probe()
2166 if (IS_ERR(ctrl->nand_base)) in brcmnand_probe()
2167 return PTR_ERR(ctrl->nand_base); in brcmnand_probe()
2170 ret = brcmnand_revision_init(ctrl); in brcmnand_probe()
2180 ctrl->nand_fc = devm_ioremap_resource(dev, res); in brcmnand_probe()
2181 if (IS_ERR(ctrl->nand_fc)) in brcmnand_probe()
2182 return PTR_ERR(ctrl->nand_fc); in brcmnand_probe()
2184 ctrl->nand_fc = ctrl->nand_base + in brcmnand_probe()
2185 ctrl->reg_offsets[BRCMNAND_FC_BASE]; in brcmnand_probe()
2191 ctrl->flash_dma_base = devm_ioremap_resource(dev, res); in brcmnand_probe()
2192 if (IS_ERR(ctrl->flash_dma_base)) in brcmnand_probe()
2193 return PTR_ERR(ctrl->flash_dma_base); in brcmnand_probe()
2195 flash_dma_writel(ctrl, FLASH_DMA_MODE, 1); /* linked-list */ in brcmnand_probe()
2196 flash_dma_writel(ctrl, FLASH_DMA_ERROR_STATUS, 0); in brcmnand_probe()
2199 ctrl->dma_desc = dmam_alloc_coherent(dev, in brcmnand_probe()
2200 sizeof(*ctrl->dma_desc), in brcmnand_probe()
2201 &ctrl->dma_pa, GFP_KERNEL); in brcmnand_probe()
2202 if (!ctrl->dma_desc) in brcmnand_probe()
2205 ctrl->dma_irq = platform_get_irq(pdev, 1); in brcmnand_probe()
2206 if ((int)ctrl->dma_irq < 0) { in brcmnand_probe()
2211 ret = devm_request_irq(dev, ctrl->dma_irq, in brcmnand_probe()
2213 ctrl); in brcmnand_probe()
2216 ctrl->dma_irq, ret); in brcmnand_probe()
2224 brcmnand_rmw_reg(ctrl, BRCMNAND_CS_SELECT, in brcmnand_probe()
2227 brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0); in brcmnand_probe()
2229 if (ctrl->features & BRCMNAND_HAS_WP) { in brcmnand_probe()
2232 brcmnand_set_wp(ctrl, false); in brcmnand_probe()
2238 ctrl->irq = platform_get_irq(pdev, 0); in brcmnand_probe()
2239 if ((int)ctrl->irq < 0) { in brcmnand_probe()
2249 ctrl->soc = soc; in brcmnand_probe()
2251 ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0, in brcmnand_probe()
2252 DRV_NAME, ctrl); in brcmnand_probe()
2255 ctrl->soc->ctlrdy_ack(ctrl->soc); in brcmnand_probe()
2256 ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); in brcmnand_probe()
2259 ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0, in brcmnand_probe()
2260 DRV_NAME, ctrl); in brcmnand_probe()
2264 ctrl->irq, ret); in brcmnand_probe()
2276 host->ctrl = ctrl; in brcmnand_probe()
2283 list_add_tail(&host->node, &ctrl->host_list); in brcmnand_probe()
2288 if (list_empty(&ctrl->host_list)) in brcmnand_probe()
2297 struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev); in brcmnand_remove() local
2300 list_for_each_entry(host, &ctrl->host_list, node) in brcmnand_remove()