Lines Matching refs:bus_width
85 int bus_width; member
103 static inline u_int build_mr_cfgmask(u_int bus_width) in build_mr_cfgmask() argument
107 if (bus_width == 0x0004) /* x32 device */ in build_mr_cfgmask()
116 static inline u_int build_sr_ok_datamask(u_int bus_width) in build_sr_ok_datamask() argument
120 if (bus_width == 0x0004) /* x32 device */ in build_sr_ok_datamask()
134 val = map->pfow_base + offset*pcm_data->bus_width; in ow_reg_add()
149 writel_relaxed(build_mr_cfgmask(pcm_data->bus_width) | 0x18, in ow_enable()
164 writel_relaxed(build_mr_cfgmask(pcm_data->bus_width) | 0x18, in ow_disable()
181 u_int sr_ok_datamask = build_sr_ok_datamask(pcm_data->bus_width); in lpddr2_nvm_do_op()
200 if (pcm_data->bus_width == 0x0004) { /* 2x16 devices stacked */ in lpddr2_nvm_do_op()
222 if (pcm_data->bus_width == 0x0004) /* 2x16 devices stacked */ in lpddr2_nvm_do_op()
229 if (pcm_data->bus_width == 0x0004) {/* 2x16 devices stacked */ in lpddr2_nvm_do_op()
347 if (pcm_data->bus_width == 0x0004) {/* 2x16 devices */ in lpddr2_nvm_write()
356 add += pcm_data->bus_width; in lpddr2_nvm_write()
357 tot_len += pcm_data->bus_width; in lpddr2_nvm_write()
427 pcm_data->bus_width = BUS_WIDTH; in lpddr2_nvm_probe()
447 .bankwidth = pcm_data->bus_width / 2, in lpddr2_nvm_probe()
468 .erasesize = ERASE_BLOCKSIZE * pcm_data->bus_width, in lpddr2_nvm_probe()
470 .writebufsize = WRITE_BUFFSIZE * pcm_data->bus_width, in lpddr2_nvm_probe()