216 	u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()  local
219 		reg_tmp &= ~BM_SD_OFF;  in wmt_set_sd_power()
221 		reg_tmp |= BM_SD_OFF;  in wmt_set_sd_power()
223 	writeb(reg_tmp, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()
251 	u32 reg_tmp;  in wmt_mci_start_command()  local
253 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
254 	writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
261 	u32 reg_tmp;  in wmt_mci_send_command()  local
271 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
272 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
284 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
285 	writeb((reg_tmp & 0x0F) | (cmdtype << 4),  in wmt_mci_send_command()
379 	u32 reg_tmp;  in wmt_mci_regular_isr()  local
389 	reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_regular_isr()
390 	if ((reg_tmp & INT0_DI_INT_EN) && (status0 & STS0_DEVICE_INS)) {  in wmt_mci_regular_isr()
468 	u32 reg_tmp;  in wmt_reset_hardware()  local
473 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
474 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
477 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
478 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
497 	reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
498 	writeb(reg_tmp | STS2_DIS_FORCECLK, priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
531 	u32 reg_tmp;  in wmt_dma_config()  local
544 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
545 		writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base +  in wmt_dma_config()
548 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
549 		writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base +  in wmt_dma_config()
556 	u32 reg_tmp;  in wmt_dma_start()  local
558 	reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
559 	writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
570 	u32 reg_tmp;  in wmt_mci_request()  local
613 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_request()
614 		writew((reg_tmp & 0xF800) | (req->data->blksz - 1),  in wmt_mci_request()
885 	u32 reg_tmp;  in wmt_mci_remove()  local
891 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
892 	writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
893 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
894 	writew(reg_tmp & ~(0xA000), priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
925 	u32 reg_tmp;  in wmt_mci_suspend()  local
934 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_suspend()
935 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_suspend()
938 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
939 	writew(reg_tmp & 0x5FFF, priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
950 	u32 reg_tmp;  in wmt_mci_resume()  local
959 		reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_resume()
960 		writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_resume()
963 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_resume()
964 		writew(reg_tmp | (BLKL_GPI_CD | BLKL_INT_ENABLE),  in wmt_mci_resume()
967 		reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_resume()
968 		writeb(reg_tmp | INT0_DI_INT_EN, priv->sdmmc_base +  in wmt_mci_resume()