Lines Matching refs:caps

149 	    (host->mmc->caps & MMC_CAP_NONREMOVABLE))  in sdhci_set_card_detection()
1639 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) in sdhci_do_get_cd()
2889 u32 caps[2] = {0, 0}; in sdhci_add_host() local
2920 caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : in sdhci_add_host()
2924 caps[1] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? in sdhci_add_host()
2930 else if (!(caps[0] & SDHCI_CAN_DO_SDMA)) in sdhci_add_host()
2942 (caps[0] & SDHCI_CAN_DO_ADMA2)) in sdhci_add_host()
3040 host->max_clk = (caps[0] & SDHCI_CLOCK_V3_BASE_MASK) in sdhci_add_host()
3043 host->max_clk = (caps[0] & SDHCI_CLOCK_BASE_MASK) in sdhci_add_host()
3061 host->clk_mul = (caps[1] & SDHCI_CLOCK_MUL_MASK) >> in sdhci_add_host()
3093 host->timeout_clk = (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> in sdhci_add_host()
3106 if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT) in sdhci_add_host()
3117 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; in sdhci_add_host()
3142 mmc->caps |= MMC_CAP_4_BIT_DATA; in sdhci_add_host()
3145 mmc->caps &= ~MMC_CAP_CMD23; in sdhci_add_host()
3147 if (caps[0] & SDHCI_CAN_DO_HISPD) in sdhci_add_host()
3148 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; in sdhci_add_host()
3151 !(mmc->caps & MMC_CAP_NONREMOVABLE) && in sdhci_add_host()
3153 mmc->caps |= MMC_CAP_NEEDS_POLL; in sdhci_add_host()
3164 caps[1] &= ~(SDHCI_SUPPORT_SDR104 | in sdhci_add_host()
3175 caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_add_host()
3179 if (caps[1] & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_add_host()
3181 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; in sdhci_add_host()
3184 if (caps[1] & SDHCI_SUPPORT_SDR104) { in sdhci_add_host()
3185 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; in sdhci_add_host()
3191 } else if (caps[1] & SDHCI_SUPPORT_SDR50) in sdhci_add_host()
3192 mmc->caps |= MMC_CAP_UHS_SDR50; in sdhci_add_host()
3195 (caps[1] & SDHCI_SUPPORT_HS400)) in sdhci_add_host()
3204 if ((caps[1] & SDHCI_SUPPORT_DDR50) && in sdhci_add_host()
3206 mmc->caps |= MMC_CAP_UHS_DDR50; in sdhci_add_host()
3209 if (caps[1] & SDHCI_USE_SDR50_TUNING) in sdhci_add_host()
3217 if (caps[1] & SDHCI_DRIVER_TYPE_A) in sdhci_add_host()
3218 mmc->caps |= MMC_CAP_DRIVER_TYPE_A; in sdhci_add_host()
3219 if (caps[1] & SDHCI_DRIVER_TYPE_C) in sdhci_add_host()
3220 mmc->caps |= MMC_CAP_DRIVER_TYPE_C; in sdhci_add_host()
3221 if (caps[1] & SDHCI_DRIVER_TYPE_D) in sdhci_add_host()
3222 mmc->caps |= MMC_CAP_DRIVER_TYPE_D; in sdhci_add_host()
3225 host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >> in sdhci_add_host()
3236 host->tuning_mode = (caps[1] & SDHCI_RETUNING_MODE_MASK) >> in sdhci_add_host()
3265 if (caps[0] & SDHCI_CAN_VDD_330) { in sdhci_add_host()
3273 if (caps[0] & SDHCI_CAN_VDD_300) { in sdhci_add_host()
3281 if (caps[0] & SDHCI_CAN_VDD_180) { in sdhci_add_host()
3358 mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> in sdhci_add_host()