251 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)  in esdhc_clrset_le()  argument
253 	void __iomem *base = host->ioaddr + (reg & ~0x3);  in esdhc_clrset_le()
259 static u32 esdhc_readl_le(struct sdhci_host *host, int reg)  in esdhc_readl_le()  argument
261 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_readl_le()
263 	u32 val = readl(host->ioaddr + reg);  in esdhc_readl_le()
296 				val = readl(host->ioaddr + SDHCI_CAPABILITIES) & 0xFFFF;  in esdhc_readl_le()
328 			writel(SDHCI_INT_RESPONSE, host->ioaddr +  in esdhc_readl_le()
337 static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)  in esdhc_writel_le()  argument
339 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_writel_le()
353 			data = readl(host->ioaddr + SDHCI_HOST_CONTROL);  in esdhc_writel_le()
355 			writel(data, host->ioaddr + SDHCI_HOST_CONTROL);  in esdhc_writel_le()
357 			writel(data, host->ioaddr + SDHCI_HOST_CONTROL);  in esdhc_writel_le()
370 			v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writel_le()
372 			writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writel_le()
379 				writel(data, host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_writel_le()
384 	writel(val, host->ioaddr + reg);  in esdhc_writel_le()
387 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)  in esdhc_readw_le()  argument
389 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_readw_le()
406 		val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_readw_le()
412 				val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_readw_le()
415 				val = readl(host->ioaddr + SDHCI_ACMD12_ERR);  in esdhc_readw_le()
430 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_readw_le()
438 			ret = readw(host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_readw_le()
444 	return readw(host->ioaddr + reg);  in esdhc_readw_le()
447 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)  in esdhc_writew_le()  argument
449 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_writew_le()
455 		new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
460 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
463 		new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
468 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
470 			new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
475 			writel(new_val , host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
477 			u32 v = readl(host->ioaddr + SDHCI_ACMD12_ERR);  in esdhc_writew_le()
478 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
490 				tuning_ctrl = readl(host->ioaddr + ESDHC_TUNING_CTRL);  in esdhc_writew_le()
494 					writel(tuning_ctrl, host->ioaddr + ESDHC_TUNING_CTRL);  in esdhc_writew_le()
499 			writel(v, host->ioaddr + SDHCI_ACMD12_ERR);  in esdhc_writew_le()
500 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
505 				&& (host->cmd->opcode == SD_IO_RW_EXTENDED)  in esdhc_writew_le()
506 				&& (host->cmd->data->blocks > 1)  in esdhc_writew_le()
507 				&& (host->cmd->data->flags & MMC_DATA_READ)) {  in esdhc_writew_le()
509 			v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
511 			writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
515 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
522 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
532 		if (host->cmd->opcode == MMC_STOP_TRANSMISSION)  in esdhc_writew_le()
535 		if ((host->cmd->opcode == MMC_SET_BLOCK_COUNT) &&  in esdhc_writew_le()
541 			       host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_writew_le()
544 			       host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_writew_le()
550 	esdhc_clrset_le(host, 0xffff, val, reg);  in esdhc_writew_le()
553 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)  in esdhc_writeb_le()  argument
555 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_writeb_le()
586 		esdhc_clrset_le(host, mask, new_val, reg);  in esdhc_writeb_le()
589 	esdhc_clrset_le(host, 0xff, val, reg);  in esdhc_writeb_le()
600 		esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL);  in esdhc_writeb_le()
607 			new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writeb_le()
609 					host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writeb_le()
615 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)  in esdhc_pltfm_get_max_clock()  argument
617 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_get_max_clock()
622 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)  in esdhc_pltfm_get_min_clock()  argument
624 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_get_min_clock()
629 static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,  in esdhc_pltfm_set_clock()  argument
632 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_set_clock()
640 		host->mmc->actual_clock = 0;  in esdhc_pltfm_set_clock()
643 			val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
645 					host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
653 	temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
656 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
664 	host->mmc->actual_clock = host_clock / pre_div / div;  in esdhc_pltfm_set_clock()
665 	dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",  in esdhc_pltfm_set_clock()
666 		clock, host->mmc->actual_clock);  in esdhc_pltfm_set_clock()
674 	temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
678 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
681 		val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
683 		host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
689 static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)  in esdhc_pltfm_get_ro()  argument
691 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_get_ro()
697 		return mmc_gpio_get_ro(host->mmc);  in esdhc_pltfm_get_ro()
699 		return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &  in esdhc_pltfm_get_ro()
708 static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)  in esdhc_pltfm_set_bus_width()  argument
724 	esdhc_clrset_le(host, ESDHC_CTRL_BUSWIDTH_MASK, ctrl,  in esdhc_pltfm_set_bus_width()
728 static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)  in esdhc_prepare_tuning()  argument
735 	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_prepare_tuning()
738 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_prepare_tuning()
739 	writel(val << 8, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);  in esdhc_prepare_tuning()
740 	dev_dbg(mmc_dev(host->mmc),  in esdhc_prepare_tuning()
742 			val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS));  in esdhc_prepare_tuning()
745 static void esdhc_post_tuning(struct sdhci_host *host)  in esdhc_post_tuning()  argument
749 	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_post_tuning()
751 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_post_tuning()
754 static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)  in esdhc_executing_tuning()  argument
761 		esdhc_prepare_tuning(host, min);  in esdhc_executing_tuning()
762 		if (!mmc_send_tuning(host->mmc, opcode, NULL))  in esdhc_executing_tuning()
770 		esdhc_prepare_tuning(host, max);  in esdhc_executing_tuning()
771 		if (mmc_send_tuning(host->mmc, opcode, NULL)) {  in esdhc_executing_tuning()
780 	esdhc_prepare_tuning(host, avg);  in esdhc_executing_tuning()
781 	ret = mmc_send_tuning(host->mmc, opcode, NULL);  in esdhc_executing_tuning()
782 	esdhc_post_tuning(host);  in esdhc_executing_tuning()
784 	dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n",  in esdhc_executing_tuning()
790 static int esdhc_change_pinstate(struct sdhci_host *host,  in esdhc_change_pinstate()  argument
793 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_change_pinstate()
797 	dev_dbg(mmc_dev(host->mmc), "change pinctrl state for uhs %d\n", uhs);  in esdhc_change_pinstate()
833 static void esdhc_set_strobe_dll(struct sdhci_host *host)  in esdhc_set_strobe_dll()  argument
837 	if (host->mmc->actual_clock > ESDHC_STROBE_DLL_CLK_FREQ) {  in esdhc_set_strobe_dll()
840 			host->ioaddr + ESDHC_STROBE_DLL_CTRL);  in esdhc_set_strobe_dll()
847 		writel(v, host->ioaddr + ESDHC_STROBE_DLL_CTRL);  in esdhc_set_strobe_dll()
850 		v = readl(host->ioaddr + ESDHC_STROBE_DLL_STATUS);  in esdhc_set_strobe_dll()
852 			dev_warn(mmc_dev(host->mmc),  in esdhc_set_strobe_dll()
855 			dev_warn(mmc_dev(host->mmc),  in esdhc_set_strobe_dll()
860 static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)  in esdhc_set_uhs_signaling()  argument
863 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_set_uhs_signaling()
868 	m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
878 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
883 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
892 			writel(v, host->ioaddr + ESDHC_DLL_CTRL);  in esdhc_set_uhs_signaling()
897 		writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
899 		esdhc_set_strobe_dll(host);  in esdhc_set_uhs_signaling()
903 	esdhc_change_pinstate(host, timing);  in esdhc_set_uhs_signaling()
906 static void esdhc_reset(struct sdhci_host *host, u8 mask)  in esdhc_reset()  argument
908 	sdhci_reset(host, mask);  in esdhc_reset()
910 	sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);  in esdhc_reset()
911 	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);  in esdhc_reset()
914 static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host)  in esdhc_get_max_timeout_count()  argument
916 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_get_max_timeout_count()
922 static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd)  in esdhc_set_timeout()  argument
924 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_set_timeout()
928 	sdhci_writeb(host, esdhc_is_usdhc(imx_data) ? 0xF : 0xE,  in esdhc_set_timeout()
960 			 struct sdhci_host *host,  in sdhci_esdhc_imx_probe_dt()  argument
984 	mmc_of_parse_voltage(np, &host->ocr_mask);  in sdhci_esdhc_imx_probe_dt()
995 			dev_warn(mmc_dev(host->mmc),  in sdhci_esdhc_imx_probe_dt()
1000 			host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;  in sdhci_esdhc_imx_probe_dt()
1003 		host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;  in sdhci_esdhc_imx_probe_dt()
1007 	ret = mmc_of_parse(host->mmc);  in sdhci_esdhc_imx_probe_dt()
1011 	if (!IS_ERR_VALUE(mmc_gpio_get_cd(host->mmc)))  in sdhci_esdhc_imx_probe_dt()
1012 		host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;  in sdhci_esdhc_imx_probe_dt()
1019 			 struct sdhci_host *host,  in sdhci_esdhc_imx_probe_dt()  argument
1027 			 struct sdhci_host *host,  in sdhci_esdhc_imx_probe_nondt()  argument
1033 	if (!host->mmc->parent->platform_data) {  in sdhci_esdhc_imx_probe_nondt()
1034 		dev_err(mmc_dev(host->mmc), "no board data!\n");  in sdhci_esdhc_imx_probe_nondt()
1039 				host->mmc->parent->platform_data);  in sdhci_esdhc_imx_probe_nondt()
1042 		err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio);  in sdhci_esdhc_imx_probe_nondt()
1044 			dev_err(mmc_dev(host->mmc),  in sdhci_esdhc_imx_probe_nondt()
1048 		host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;  in sdhci_esdhc_imx_probe_nondt()
1054 		err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0);  in sdhci_esdhc_imx_probe_nondt()
1056 			dev_err(mmc_dev(host->mmc),  in sdhci_esdhc_imx_probe_nondt()
1064 		host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;  in sdhci_esdhc_imx_probe_nondt()
1068 		host->mmc->caps |= MMC_CAP_NONREMOVABLE;  in sdhci_esdhc_imx_probe_nondt()
1077 		host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA;  in sdhci_esdhc_imx_probe_nondt()
1080 		host->mmc->caps |= MMC_CAP_4_BIT_DATA;  in sdhci_esdhc_imx_probe_nondt()
1084 		host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;  in sdhci_esdhc_imx_probe_nondt()
1096 	struct sdhci_host *host;  in sdhci_esdhc_imx_probe()  local
1100 	host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata, 0);  in sdhci_esdhc_imx_probe()
1101 	if (IS_ERR(host))  in sdhci_esdhc_imx_probe()
1102 		return PTR_ERR(host);  in sdhci_esdhc_imx_probe()
1104 	pltfm_host = sdhci_priv(host);  in sdhci_esdhc_imx_probe()
1149 		dev_warn(mmc_dev(host->mmc), "could not get default state\n");  in sdhci_esdhc_imx_probe()
1151 	host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;  in sdhci_esdhc_imx_probe()
1155 		host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK  in sdhci_esdhc_imx_probe()
1163 		writel(0x10401040, host->ioaddr + ESDHC_WTMK_LVL);  in sdhci_esdhc_imx_probe()
1165 		host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;  in sdhci_esdhc_imx_probe()
1166 		host->mmc->caps |= MMC_CAP_1_8V_DDR;  in sdhci_esdhc_imx_probe()
1179 		writel(readl(host->ioaddr + SDHCI_HOST_CONTROL)  in sdhci_esdhc_imx_probe()
1181 			host->ioaddr + SDHCI_HOST_CONTROL);  in sdhci_esdhc_imx_probe()
1184 			host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;  in sdhci_esdhc_imx_probe()
1190 		writel(readl(host->ioaddr + 0x6c) | BIT(7),  in sdhci_esdhc_imx_probe()
1191 			host->ioaddr + 0x6c);  in sdhci_esdhc_imx_probe()
1199 		writel(readl(host->ioaddr + ESDHC_TUNING_CTRL) |  in sdhci_esdhc_imx_probe()
1201 			host->ioaddr + ESDHC_TUNING_CTRL);  in sdhci_esdhc_imx_probe()
1204 		host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;  in sdhci_esdhc_imx_probe()
1207 		host->quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400;  in sdhci_esdhc_imx_probe()
1210 		err = sdhci_esdhc_imx_probe_dt(pdev, host, imx_data);  in sdhci_esdhc_imx_probe()
1212 		err = sdhci_esdhc_imx_probe_nondt(pdev, host, imx_data);  in sdhci_esdhc_imx_probe()
1216 	err = sdhci_add_host(host);  in sdhci_esdhc_imx_probe()
1239 	struct sdhci_host *host = platform_get_drvdata(pdev);  in sdhci_esdhc_imx_remove()  local
1240 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in sdhci_esdhc_imx_remove()
1242 	int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);  in sdhci_esdhc_imx_remove()
1248 	sdhci_remove_host(host, dead);  in sdhci_esdhc_imx_remove()
1262 	struct sdhci_host *host = dev_get_drvdata(dev);  in sdhci_esdhc_runtime_suspend()  local
1263 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in sdhci_esdhc_runtime_suspend()
1267 	ret = sdhci_runtime_suspend_host(host);  in sdhci_esdhc_runtime_suspend()
1269 	if (!sdhci_sdio_irq_enabled(host)) {  in sdhci_esdhc_runtime_suspend()
1280 	struct sdhci_host *host = dev_get_drvdata(dev);  in sdhci_esdhc_runtime_resume()  local
1281 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in sdhci_esdhc_runtime_resume()
1284 	if (!sdhci_sdio_irq_enabled(host)) {  in sdhci_esdhc_runtime_resume()
1290 	return sdhci_runtime_resume_host(host);  in sdhci_esdhc_runtime_resume()