252 	struct mmc_ios *ios = &mmc->ios;  in omap_hsmmc_enable_supply()  local
255 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);  in omap_hsmmc_enable_supply()
616 static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios)  in calc_divisor()  argument
620 	if (ios->clock) {  in calc_divisor()
621 		dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock);  in calc_divisor()
631 	struct mmc_ios *ios = &host->mmc->ios;  in omap_hsmmc_set_clock()  local
636 	dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock);  in omap_hsmmc_set_clock()
642 	clkdiv = calc_divisor(host, ios);  in omap_hsmmc_set_clock()
664 	    (ios->timing != MMC_TIMING_MMC_DDR52) &&  in omap_hsmmc_set_clock()
665 	    (ios->timing != MMC_TIMING_UHS_DDR50) &&  in omap_hsmmc_set_clock()
681 	struct mmc_ios *ios = &host->mmc->ios;  in omap_hsmmc_set_bus_width()  local
685 	if (ios->timing == MMC_TIMING_MMC_DDR52 ||  in omap_hsmmc_set_bus_width()
686 	    ios->timing == MMC_TIMING_UHS_DDR50)  in omap_hsmmc_set_bus_width()
690 	switch (ios->bus_width) {  in omap_hsmmc_set_bus_width()
709 	struct mmc_ios *ios = &host->mmc->ios;  in omap_hsmmc_set_bus_mode()  local
713 	if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)  in omap_hsmmc_set_bus_mode()
727 	struct mmc_ios *ios = &host->mmc->ios;  in omap_hsmmc_context_restore()  local
741 		    (1 << ios->vdd) <= MMC_VDD_23_24)  in omap_hsmmc_context_restore()
1648 static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)  in omap_hsmmc_set_ios()  argument
1655 	if (ios->power_mode != host->power_mode) {  in omap_hsmmc_set_ios()
1656 		switch (ios->power_mode) {  in omap_hsmmc_set_ios()
1661 			omap_hsmmc_set_power(host->dev, 1, ios->vdd);  in omap_hsmmc_set_ios()
1667 		host->power_mode = ios->power_mode;  in omap_hsmmc_set_ios()
1679 			(ios->vdd == DUAL_VOLT_OCR_BIT)) {  in omap_hsmmc_set_ios()
1686 			if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0)  in omap_hsmmc_set_ios()