275 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_prepare_command()
374 	mci_writel(host, CMDARG, cmd->arg);  in dw_mci_start_command()
378 	mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);  in dw_mci_start_command()
425 	mci_writel(host, BMOD, bmod);  in dw_mci_idmac_reset()
436 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_stop_dma()
442 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_stop_dma()
586 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_start_dma()
594 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_start_dma()
597 	mci_writel(host, PLDMND, 1);  in dw_mci_idmac_start_dma()
655 		mci_writel(host, IDSTS64, IDMAC_INT_CLR);  in dw_mci_idmac_init()
656 		mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
660 		mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff);  in dw_mci_idmac_init()
661 		mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32);  in dw_mci_idmac_init()
665 		mci_writel(host, IDSTS, IDMAC_INT_CLR);  in dw_mci_idmac_init()
666 		mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
670 		mci_writel(host, DBADDR, host->sg_dma);  in dw_mci_idmac_init()
901 	mci_writel(host, FIFOTH, fifoth_val);  in dw_mci_adjust_fifoth()
936 	mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(thld_size, 1));  in dw_mci_ctrl_rd_thld()
940 	mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(0, 0));  in dw_mci_ctrl_rd_thld()
981 	mci_writel(host, CTRL, temp);  in dw_mci_submit_data_dma()
987 	mci_writel(host, INTMASK, temp);  in dw_mci_submit_data_dma()
1029 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR);  in dw_mci_submit_data()
1034 		mci_writel(host, INTMASK, temp);  in dw_mci_submit_data()
1039 		mci_writel(host, CTRL, temp);  in dw_mci_submit_data()
1046 		mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_submit_data()
1064 	mci_writel(host, CMDARG, arg);  in mci_send_cmd()
1067 	mci_writel(host, CMD, SDMMC_CMD_START | cmd);  in mci_send_cmd()
1092 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1113 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1114 		mci_writel(host, CLKSRC, 0);  in dw_mci_setup_bus()
1120 		mci_writel(host, CLKDIV, div);  in dw_mci_setup_bus()
1129 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_setup_bus()
1141 	mci_writel(host, CTYPE, (slot->ctype << slot->id));  in dw_mci_setup_bus()
1165 		mci_writel(host, TMOUT, 0xFFFFFFFF);  in __dw_mci_start_request()
1166 		mci_writel(host, BYTCNT, data->blksz*data->blocks);  in __dw_mci_start_request()
1167 		mci_writel(host, BLKSIZ, data->blksz);  in __dw_mci_start_request()
1302 	mci_writel(slot->host, UHS_REG, regs);  in dw_mci_set_ios()
1329 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1368 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1425 	mci_writel(host, UHS_REG, uhs);  in dw_mci_switch_voltage()
1507 			mci_writel(host, CLKENA, clk_en_a);  in dw_mci_init_card()
1529 	mci_writel(host, INTMASK, int_mask);  in dw_mci_enable_sdio_irq()
2248 		mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_read_data_pio()
2304 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_write_data_pio()
2374 			mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH);  in dw_mci_interrupt()
2389 			mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);  in dw_mci_interrupt()
2397 			mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS);  in dw_mci_interrupt()
2408 			mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);  in dw_mci_interrupt()
2421 			mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_interrupt()
2427 			mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_interrupt()
2433 			mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);  in dw_mci_interrupt()
2438 			mci_writel(host, RINTSTS, SDMMC_INT_CD);  in dw_mci_interrupt()
2450 				mci_writel(host, RINTSTS,  in dw_mci_interrupt()
2465 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2467 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
2473 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2475 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
2736 	mci_writel(host, CTRL, ctrl);  in dw_mci_ctrl_reset()
2774 		mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_reset()
2949 	mci_writel(host, INTMASK, temp);  in dw_mci_enable_cd()
3078 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_probe()
3079 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_probe()
3082 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_probe()
3103 	mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_probe()
3106 	mci_writel(host, CLKENA, 0);  in dw_mci_probe()
3107 	mci_writel(host, CLKSRC, 0);  in dw_mci_probe()
3136 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_probe()
3137 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_probe()
3141 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_probe()
3199 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_remove()
3200 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_remove()
3203 	mci_writel(host, CLKENA, 0);  in dw_mci_remove()
3204 	mci_writel(host, CLKSRC, 0);  in dw_mci_remove()
3248 	mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_resume()
3252 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_resume()
3254 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_resume()
3255 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_resume()
3258 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_resume()