Lines Matching refs:pcr
69 static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr) in rtsx_pci_enable_aspm() argument
71 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, in rtsx_pci_enable_aspm()
72 0xFC, pcr->aspm_en); in rtsx_pci_enable_aspm()
75 static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr) in rtsx_pci_disable_aspm() argument
77 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, in rtsx_pci_disable_aspm()
81 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
84 if (pcr->remove_pci) in rtsx_pci_start_run()
87 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
88 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
89 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
90 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
92 if (pcr->aspm_en) in rtsx_pci_start_run()
93 rtsx_pci_disable_aspm(pcr); in rtsx_pci_start_run()
96 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_start_run()
100 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
109 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
112 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
124 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) in rtsx_pci_read_register() argument
130 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_read_register()
133 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_read_register()
148 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in __rtsx_pci_write_phy_register() argument
153 rtsx_pci_init_cmd(pcr); in __rtsx_pci_write_phy_register()
155 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA0, 0xFF, (u8)val); in __rtsx_pci_write_phy_register()
156 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA1, 0xFF, (u8)(val >> 8)); in __rtsx_pci_write_phy_register()
157 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); in __rtsx_pci_write_phy_register()
158 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x81); in __rtsx_pci_write_phy_register()
160 err = rtsx_pci_send_cmd(pcr, 100); in __rtsx_pci_write_phy_register()
165 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_write_phy_register()
181 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in rtsx_pci_write_phy_register() argument
183 if (pcr->ops->write_phy) in rtsx_pci_write_phy_register()
184 return pcr->ops->write_phy(pcr, addr, val); in rtsx_pci_write_phy_register()
186 return __rtsx_pci_write_phy_register(pcr, addr, val); in rtsx_pci_write_phy_register()
190 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in __rtsx_pci_read_phy_register() argument
196 rtsx_pci_init_cmd(pcr); in __rtsx_pci_read_phy_register()
198 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); in __rtsx_pci_read_phy_register()
199 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x80); in __rtsx_pci_read_phy_register()
201 err = rtsx_pci_send_cmd(pcr, 100); in __rtsx_pci_read_phy_register()
206 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_read_phy_register()
219 rtsx_pci_init_cmd(pcr); in __rtsx_pci_read_phy_register()
221 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA0, 0, 0); in __rtsx_pci_read_phy_register()
222 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA1, 0, 0); in __rtsx_pci_read_phy_register()
224 err = rtsx_pci_send_cmd(pcr, 100); in __rtsx_pci_read_phy_register()
228 ptr = rtsx_pci_get_cmd_data(pcr); in __rtsx_pci_read_phy_register()
237 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in rtsx_pci_read_phy_register() argument
239 if (pcr->ops->read_phy) in rtsx_pci_read_phy_register()
240 return pcr->ops->read_phy(pcr, addr, val); in rtsx_pci_read_phy_register()
242 return __rtsx_pci_read_phy_register(pcr, addr, val); in rtsx_pci_read_phy_register()
246 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) in rtsx_pci_stop_cmd() argument
248 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rtsx_pci_stop_cmd()
249 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rtsx_pci_stop_cmd()
251 rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
252 rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
256 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, in rtsx_pci_add_cmd() argument
261 u32 *ptr = (u32 *)(pcr->host_cmds_ptr); in rtsx_pci_add_cmd()
268 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_add_cmd()
269 ptr += pcr->ci; in rtsx_pci_add_cmd()
270 if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { in rtsx_pci_add_cmd()
273 pcr->ci++; in rtsx_pci_add_cmd()
275 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_add_cmd()
279 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) in rtsx_pci_send_cmd_no_wait() argument
283 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd_no_wait()
285 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd_no_wait()
288 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd_no_wait()
292 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) in rtsx_pci_send_cmd() argument
300 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
303 pcr->done = &trans_done; in rtsx_pci_send_cmd()
304 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_send_cmd()
307 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd()
309 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd()
312 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd()
314 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
320 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_send_cmd()
325 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
326 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_send_cmd()
328 else if (pcr->trans_result == TRANS_RESULT_OK) in rtsx_pci_send_cmd()
330 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_send_cmd()
332 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
335 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
336 pcr->done = NULL; in rtsx_pci_send_cmd()
337 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
340 rtsx_pci_stop_cmd(pcr); in rtsx_pci_send_cmd()
342 if (pcr->finish_me) in rtsx_pci_send_cmd()
343 complete(pcr->finish_me); in rtsx_pci_send_cmd()
349 static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, in rtsx_pci_add_sg_tbl() argument
352 u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; in rtsx_pci_add_sg_tbl()
356 pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len); in rtsx_pci_add_sg_tbl()
363 pcr->sgi++; in rtsx_pci_add_sg_tbl()
366 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_transfer_data() argument
371 pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg); in rtsx_pci_transfer_data()
372 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
375 pcr_dbg(pcr, "DMA mapping count: %d\n", count); in rtsx_pci_transfer_data()
377 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); in rtsx_pci_transfer_data()
379 rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
385 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_map_sg() argument
390 if (pcr->remove_pci) in rtsx_pci_dma_map_sg()
396 return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_map_sg()
400 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_unmap_sg() argument
405 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_unmap_sg()
409 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_transfer() argument
422 if (pcr->remove_pci) in rtsx_pci_dma_transfer()
429 pcr->sgi = 0; in rtsx_pci_dma_transfer()
433 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); in rtsx_pci_dma_transfer()
436 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
438 pcr->done = &trans_done; in rtsx_pci_dma_transfer()
439 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_dma_transfer()
441 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); in rtsx_pci_dma_transfer()
442 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); in rtsx_pci_dma_transfer()
444 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
449 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_dma_transfer()
454 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
455 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_dma_transfer()
457 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_dma_transfer()
459 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
462 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
463 pcr->done = NULL; in rtsx_pci_dma_transfer()
464 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
467 rtsx_pci_stop_cmd(pcr); in rtsx_pci_dma_transfer()
469 if (pcr->finish_me) in rtsx_pci_dma_transfer()
470 complete(pcr->finish_me); in rtsx_pci_dma_transfer()
476 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_read_ppbuf() argument
489 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
492 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
494 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
498 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); in rtsx_pci_read_ppbuf()
503 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
506 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
508 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
513 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); in rtsx_pci_read_ppbuf()
519 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_write_ppbuf() argument
532 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
535 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
540 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
546 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
549 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
554 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
563 static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) in rtsx_pci_set_pull_ctl() argument
565 rtsx_pci_init_cmd(pcr); in rtsx_pci_set_pull_ctl()
568 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
573 return rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_set_pull_ctl()
576 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_enable() argument
581 tbl = pcr->sd_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
583 tbl = pcr->ms_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
587 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_enable()
591 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_disable() argument
596 tbl = pcr->sd_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
598 tbl = pcr->ms_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
603 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_disable()
607 static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) in rtsx_pci_enable_bus_int() argument
609 pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN; in rtsx_pci_enable_bus_int()
611 if (pcr->num_slots > 1) in rtsx_pci_enable_bus_int()
612 pcr->bier |= MS_INT_EN; in rtsx_pci_enable_bus_int()
615 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); in rtsx_pci_enable_bus_int()
617 pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier); in rtsx_pci_enable_bus_int()
637 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rtsx_pci_switch_clock() argument
657 err = rtsx_pci_write_register(pcr, SD_CFG1, in rtsx_pci_switch_clock()
663 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rtsx_pci_switch_clock()
668 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rtsx_pci_switch_clock()
669 clk, pcr->cur_clock); in rtsx_pci_switch_clock()
671 if (clk == pcr->cur_clock) in rtsx_pci_switch_clock()
674 if (pcr->ops->conv_clk_and_div_n) in rtsx_pci_switch_clock()
675 n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rtsx_pci_switch_clock()
688 if (pcr->ops->conv_clk_and_div_n) { in rtsx_pci_switch_clock()
689 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rtsx_pci_switch_clock()
691 n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, in rtsx_pci_switch_clock()
698 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rtsx_pci_switch_clock()
705 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rtsx_pci_switch_clock()
707 rtsx_pci_init_cmd(pcr); in rtsx_pci_switch_clock()
708 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
710 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
712 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
713 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
715 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
716 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
718 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
720 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
724 err = rtsx_pci_send_cmd(pcr, 2000); in rtsx_pci_switch_clock()
730 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
734 pcr->cur_clock = clk; in rtsx_pci_switch_clock()
739 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_on() argument
741 if (pcr->ops->card_power_on) in rtsx_pci_card_power_on()
742 return pcr->ops->card_power_on(pcr, card); in rtsx_pci_card_power_on()
748 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_off() argument
750 if (pcr->ops->card_power_off) in rtsx_pci_card_power_off()
751 return pcr->ops->card_power_off(pcr, card); in rtsx_pci_card_power_off()
757 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_exclusive_check() argument
764 if (!(pcr->flags & PCR_MS_PMOS)) { in rtsx_pci_card_exclusive_check()
768 if (pcr->card_exist & (~cd_mask[card])) in rtsx_pci_card_exclusive_check()
776 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rtsx_pci_switch_output_voltage() argument
778 if (pcr->ops->switch_output_voltage) in rtsx_pci_switch_output_voltage()
779 return pcr->ops->switch_output_voltage(pcr, voltage); in rtsx_pci_switch_output_voltage()
785 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) in rtsx_pci_card_exist() argument
789 val = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_exist()
790 if (pcr->ops->cd_deglitch) in rtsx_pci_card_exist()
791 val = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_exist()
797 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) in rtsx_pci_complete_unfinished_transfer() argument
801 pcr->finish_me = &finish; in rtsx_pci_complete_unfinished_transfer()
804 if (pcr->done) in rtsx_pci_complete_unfinished_transfer()
805 complete(pcr->done); in rtsx_pci_complete_unfinished_transfer()
807 if (!pcr->remove_pci) in rtsx_pci_complete_unfinished_transfer()
808 rtsx_pci_stop_cmd(pcr); in rtsx_pci_complete_unfinished_transfer()
812 pcr->finish_me = NULL; in rtsx_pci_complete_unfinished_transfer()
819 struct rtsx_pcr *pcr; in rtsx_pci_card_detect() local
825 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); in rtsx_pci_card_detect()
827 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_card_detect()
829 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
830 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_card_detect()
832 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_detect()
833 pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status); in rtsx_pci_card_detect()
836 card_inserted = pcr->card_inserted & irq_status; in rtsx_pci_card_detect()
837 card_removed = pcr->card_removed; in rtsx_pci_card_detect()
838 pcr->card_inserted = 0; in rtsx_pci_card_detect()
839 pcr->card_removed = 0; in rtsx_pci_card_detect()
841 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_card_detect()
844 pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n", in rtsx_pci_card_detect()
847 if (pcr->ops->cd_deglitch) in rtsx_pci_card_detect()
848 card_inserted = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_detect()
852 pcr->card_exist |= card_inserted; in rtsx_pci_card_detect()
853 pcr->card_exist &= ~card_removed; in rtsx_pci_card_detect()
856 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
858 if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) in rtsx_pci_card_detect()
859 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_card_detect()
860 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_card_detect()
861 if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) in rtsx_pci_card_detect()
862 pcr->slots[RTSX_MS_CARD].card_event( in rtsx_pci_card_detect()
863 pcr->slots[RTSX_MS_CARD].p_dev); in rtsx_pci_card_detect()
868 struct rtsx_pcr *pcr = dev_id; in rtsx_pci_isr() local
871 if (!pcr) in rtsx_pci_isr()
874 spin_lock(&pcr->lock); in rtsx_pci_isr()
876 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_isr()
878 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); in rtsx_pci_isr()
879 if ((int_reg & pcr->bier) == 0) { in rtsx_pci_isr()
880 spin_unlock(&pcr->lock); in rtsx_pci_isr()
884 spin_unlock(&pcr->lock); in rtsx_pci_isr()
888 int_reg &= (pcr->bier | 0x7FFFFF); in rtsx_pci_isr()
892 pcr->card_inserted |= SD_EXIST; in rtsx_pci_isr()
894 pcr->card_removed |= SD_EXIST; in rtsx_pci_isr()
895 pcr->card_inserted &= ~SD_EXIST; in rtsx_pci_isr()
901 pcr->card_inserted |= MS_EXIST; in rtsx_pci_isr()
903 pcr->card_removed |= MS_EXIST; in rtsx_pci_isr()
904 pcr->card_inserted &= ~MS_EXIST; in rtsx_pci_isr()
910 pcr->trans_result = TRANS_RESULT_FAIL; in rtsx_pci_isr()
911 if (pcr->done) in rtsx_pci_isr()
912 complete(pcr->done); in rtsx_pci_isr()
914 pcr->trans_result = TRANS_RESULT_OK; in rtsx_pci_isr()
915 if (pcr->done) in rtsx_pci_isr()
916 complete(pcr->done); in rtsx_pci_isr()
920 if (pcr->card_inserted || pcr->card_removed) in rtsx_pci_isr()
921 schedule_delayed_work(&pcr->carddet_work, in rtsx_pci_isr()
924 spin_unlock(&pcr->lock); in rtsx_pci_isr()
928 static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) in rtsx_pci_acquire_irq() argument
930 dev_info(&(pcr->pci->dev), "%s: pcr->msi_en = %d, pci->irq = %d\n", in rtsx_pci_acquire_irq()
931 __func__, pcr->msi_en, pcr->pci->irq); in rtsx_pci_acquire_irq()
933 if (request_irq(pcr->pci->irq, rtsx_pci_isr, in rtsx_pci_acquire_irq()
934 pcr->msi_en ? 0 : IRQF_SHARED, in rtsx_pci_acquire_irq()
935 DRV_NAME_RTSX_PCI, pcr)) { in rtsx_pci_acquire_irq()
936 dev_err(&(pcr->pci->dev), in rtsx_pci_acquire_irq()
938 pcr->pci->irq); in rtsx_pci_acquire_irq()
942 pcr->irq = pcr->pci->irq; in rtsx_pci_acquire_irq()
943 pci_intx(pcr->pci, !pcr->msi_en); in rtsx_pci_acquire_irq()
951 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); in rtsx_pci_idle_work() local
953 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_idle_work()
955 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
957 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_idle_work()
959 if (pcr->ops->disable_auto_blink) in rtsx_pci_idle_work()
960 pcr->ops->disable_auto_blink(pcr); in rtsx_pci_idle_work()
961 if (pcr->ops->turn_off_led) in rtsx_pci_idle_work()
962 pcr->ops->turn_off_led(pcr); in rtsx_pci_idle_work()
964 if (pcr->aspm_en) in rtsx_pci_idle_work()
965 rtsx_pci_enable_aspm(pcr); in rtsx_pci_idle_work()
967 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
971 static void rtsx_pci_power_off(struct rtsx_pcr *pcr, u8 pm_state) in rtsx_pci_power_off() argument
973 if (pcr->ops->turn_off_led) in rtsx_pci_power_off()
974 pcr->ops->turn_off_led(pcr); in rtsx_pci_power_off()
976 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_power_off()
977 pcr->bier = 0; in rtsx_pci_power_off()
979 rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); in rtsx_pci_power_off()
980 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state); in rtsx_pci_power_off()
982 if (pcr->ops->force_power_down) in rtsx_pci_power_off()
983 pcr->ops->force_power_down(pcr, pm_state); in rtsx_pci_power_off()
987 static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) in rtsx_pci_init_hw() argument
991 pcr->pcie_cap = pci_find_capability(pcr->pci, PCI_CAP_ID_EXP); in rtsx_pci_init_hw()
992 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_init_hw()
994 rtsx_pci_enable_bus_int(pcr); in rtsx_pci_init_hw()
997 err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); in rtsx_pci_init_hw()
1004 rtsx_pci_disable_aspm(pcr); in rtsx_pci_init_hw()
1005 if (pcr->ops->optimize_phy) { in rtsx_pci_init_hw()
1006 err = pcr->ops->optimize_phy(pcr); in rtsx_pci_init_hw()
1011 rtsx_pci_init_cmd(pcr); in rtsx_pci_init_hw()
1014 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); in rtsx_pci_init_hw()
1016 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_init_hw()
1018 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); in rtsx_pci_init_hw()
1020 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); in rtsx_pci_init_hw()
1022 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DRIVE_SEL, in rtsx_pci_init_hw()
1023 0xFF, pcr->card_drive_sel); in rtsx_pci_init_hw()
1025 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, in rtsx_pci_init_hw()
1027 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); in rtsx_pci_init_hw()
1029 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); in rtsx_pci_init_hw()
1031 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in rtsx_pci_init_hw()
1036 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); in rtsx_pci_init_hw()
1041 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); in rtsx_pci_init_hw()
1047 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); in rtsx_pci_init_hw()
1049 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_init_hw()
1054 rtsx_pci_write_config_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL + 1, 1); in rtsx_pci_init_hw()
1056 rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B); in rtsx_pci_init_hw()
1058 if (pcr->ops->extra_init_hw) { in rtsx_pci_init_hw()
1059 err = pcr->ops->extra_init_hw(pcr); in rtsx_pci_init_hw()
1067 if (pcr->ops->cd_deglitch) in rtsx_pci_init_hw()
1068 pcr->card_exist = pcr->ops->cd_deglitch(pcr); in rtsx_pci_init_hw()
1070 pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; in rtsx_pci_init_hw()
1075 static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) in rtsx_pci_init_chip() argument
1079 spin_lock_init(&pcr->lock); in rtsx_pci_init_chip()
1080 mutex_init(&pcr->pcr_mutex); in rtsx_pci_init_chip()
1082 switch (PCI_PID(pcr)) { in rtsx_pci_init_chip()
1085 rts5209_init_params(pcr); in rtsx_pci_init_chip()
1089 rts5229_init_params(pcr); in rtsx_pci_init_chip()
1093 rtl8411_init_params(pcr); in rtsx_pci_init_chip()
1097 rts5227_init_params(pcr); in rtsx_pci_init_chip()
1101 rts522a_init_params(pcr); in rtsx_pci_init_chip()
1105 rts5249_init_params(pcr); in rtsx_pci_init_chip()
1109 rts524a_init_params(pcr); in rtsx_pci_init_chip()
1113 rts525a_init_params(pcr); in rtsx_pci_init_chip()
1117 rtl8411b_init_params(pcr); in rtsx_pci_init_chip()
1121 rtl8402_init_params(pcr); in rtsx_pci_init_chip()
1125 pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", in rtsx_pci_init_chip()
1126 PCI_PID(pcr), pcr->ic_version); in rtsx_pci_init_chip()
1128 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), in rtsx_pci_init_chip()
1130 if (!pcr->slots) in rtsx_pci_init_chip()
1133 if (pcr->ops->fetch_vendor_settings) in rtsx_pci_init_chip()
1134 pcr->ops->fetch_vendor_settings(pcr); in rtsx_pci_init_chip()
1136 pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en); in rtsx_pci_init_chip()
1137 pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n", in rtsx_pci_init_chip()
1138 pcr->sd30_drive_sel_1v8); in rtsx_pci_init_chip()
1139 pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n", in rtsx_pci_init_chip()
1140 pcr->sd30_drive_sel_3v3); in rtsx_pci_init_chip()
1141 pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n", in rtsx_pci_init_chip()
1142 pcr->card_drive_sel); in rtsx_pci_init_chip()
1143 pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags); in rtsx_pci_init_chip()
1145 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_init_chip()
1146 err = rtsx_pci_init_hw(pcr); in rtsx_pci_init_chip()
1148 kfree(pcr->slots); in rtsx_pci_init_chip()
1158 struct rtsx_pcr *pcr; in rtsx_pci_probe() local
1180 pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); in rtsx_pci_probe()
1181 if (!pcr) { in rtsx_pci_probe()
1191 handle->pcr = pcr; in rtsx_pci_probe()
1195 ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); in rtsx_pci_probe()
1197 pcr->id = ret; in rtsx_pci_probe()
1203 pcr->pci = pcidev; in rtsx_pci_probe()
1206 if (CHK_PCI_PID(pcr, 0x525A)) in rtsx_pci_probe()
1210 pcr->remap_addr = ioremap_nocache(base, len); in rtsx_pci_probe()
1211 if (!pcr->remap_addr) { in rtsx_pci_probe()
1216 pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), in rtsx_pci_probe()
1217 RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), in rtsx_pci_probe()
1219 if (pcr->rtsx_resv_buf == NULL) { in rtsx_pci_probe()
1223 pcr->host_cmds_ptr = pcr->rtsx_resv_buf; in rtsx_pci_probe()
1224 pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; in rtsx_pci_probe()
1225 pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1226 pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1228 pcr->card_inserted = 0; in rtsx_pci_probe()
1229 pcr->card_removed = 0; in rtsx_pci_probe()
1230 INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); in rtsx_pci_probe()
1231 INIT_DELAYED_WORK(&pcr->idle_work, rtsx_pci_idle_work); in rtsx_pci_probe()
1233 pcr->msi_en = msi_en; in rtsx_pci_probe()
1234 if (pcr->msi_en) { in rtsx_pci_probe()
1237 pcr->msi_en = false; in rtsx_pci_probe()
1240 ret = rtsx_pci_acquire_irq(pcr); in rtsx_pci_probe()
1245 synchronize_irq(pcr->irq); in rtsx_pci_probe()
1247 ret = rtsx_pci_init_chip(pcr); in rtsx_pci_probe()
1255 ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, in rtsx_pci_probe()
1260 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_probe()
1265 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_probe()
1267 if (pcr->msi_en) in rtsx_pci_probe()
1268 pci_disable_msi(pcr->pci); in rtsx_pci_probe()
1269 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_probe()
1270 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_probe()
1272 iounmap(pcr->remap_addr); in rtsx_pci_probe()
1276 kfree(pcr); in rtsx_pci_probe()
1288 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_remove() local
1290 pcr->remove_pci = true; in rtsx_pci_remove()
1293 spin_lock_irq(&pcr->lock); in rtsx_pci_remove()
1294 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_remove()
1295 pcr->bier = 0; in rtsx_pci_remove()
1296 spin_unlock_irq(&pcr->lock); in rtsx_pci_remove()
1298 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_remove()
1299 cancel_delayed_work_sync(&pcr->idle_work); in rtsx_pci_remove()
1303 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_remove()
1304 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_remove()
1305 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_remove()
1306 if (pcr->msi_en) in rtsx_pci_remove()
1307 pci_disable_msi(pcr->pci); in rtsx_pci_remove()
1308 iounmap(pcr->remap_addr); in rtsx_pci_remove()
1314 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_remove()
1317 kfree(pcr->slots); in rtsx_pci_remove()
1318 kfree(pcr); in rtsx_pci_remove()
1331 struct rtsx_pcr *pcr; in rtsx_pci_suspend() local
1336 pcr = handle->pcr; in rtsx_pci_suspend()
1338 cancel_delayed_work(&pcr->carddet_work); in rtsx_pci_suspend()
1339 cancel_delayed_work(&pcr->idle_work); in rtsx_pci_suspend()
1341 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1343 rtsx_pci_power_off(pcr, HOST_ENTER_S3); in rtsx_pci_suspend()
1350 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1357 struct rtsx_pcr *pcr; in rtsx_pci_resume() local
1363 pcr = handle->pcr; in rtsx_pci_resume()
1365 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_resume()
1374 ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_resume()
1378 ret = rtsx_pci_init_hw(pcr); in rtsx_pci_resume()
1382 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_resume()
1385 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_resume()
1392 struct rtsx_pcr *pcr; in rtsx_pci_shutdown() local
1397 pcr = handle->pcr; in rtsx_pci_shutdown()
1398 rtsx_pci_power_off(pcr, HOST_ENTER_S1); in rtsx_pci_shutdown()