Lines Matching refs:BIT

16 #define BITS(_start, _end) ((BIT(_end) - BIT(_start)) + BIT(_end))
60 #define PRCM_ARM_CHGCLKREQ_PRCM_ARM_CHGCLKREQ	BIT(0)
61 #define PRCM_ARM_CHGCLKREQ_PRCM_ARM_DIVSEL	BIT(16)
74 #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN BIT(0)
75 #define PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN BIT(1)
84 #define PRCM_HOSTACCESS_REQ_WAKE_REQ	BIT(16)
92 #define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_COREPD_AWAKE	BIT(0)
93 #define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_AAPD_AWAKE	BIT(1)
94 #define PRCM_MOD_AWAKE_STATUS_PRCM_MOD_VMODEM_OFF_ISO	BIT(2)
112 #define PRCM_MMIP_LS_CLAMP_DSIPLL_CLAMP		BIT(11)
113 #define PRCM_MMIP_LS_CLAMP_DSIPLL_CLAMPI	BIT(22)
126 #define PRCM_PLL_FREQ_SELDIV2	BIT(24)
127 #define PRCM_PLL_FREQ_DIV2EN	BIT(25)
138 #define PRCM_PLLDSI_ENABLE_PRCM_PLLDSI_ENABLE BIT(0)
140 #define PRCM_PLLDSI_LOCKP_PRCM_PLLDSI_LOCKP10	BIT(0)
141 #define PRCM_PLLDSI_LOCKP_PRCM_PLLDSI_LOCKP3	BIT(1)
159 #define PRCM_DSITVCLK_DIV_DSI0_ESC_CLK_EN		BIT(24)
160 #define PRCM_DSITVCLK_DIV_DSI1_ESC_CLK_EN		BIT(25)
161 #define PRCM_DSITVCLK_DIV_DSI2_ESC_CLK_EN		BIT(26)
163 #define PRCM_APE_RESETN_DSIPLL_RESETN BIT(14)
186 #define PRCM_SEM_PRCM_SEM BIT(0)
190 #define PRCM_TCR_STOP_TIMERS       BIT(16)
191 #define PRCM_TCR_DOZE_MODE         BIT(17)
201 #define PRCM_CLKOCR_CLK1TYPE		BIT(28)
204 #define PRCM_CLK_MGT_CLKPLLSW_SOC0		BIT(5)
205 #define PRCM_CLK_MGT_CLKPLLSW_SOC1		BIT(6)
206 #define PRCM_CLK_MGT_CLKPLLSW_DDR		BIT(7)
208 #define PRCM_CLK_MGT_CLKEN			BIT(8)
209 #define PRCM_CLK_MGT_CLK38			BIT(9)
210 #define PRCM_CLK_MGT_CLK38DIV			BIT(11)
211 #define PRCM_SGACLK_MGT_SGACLKDIV_BY_2_5_EN	BIT(12)
214 #define PRCM_GPIOCR_SPI2_SELECT BIT(23)
218 #define PRCM_CGATING_BYPASS_ICN2	BIT(6)