Lines Matching refs:value
77 u32 value = 0; in initGPIO() local
82 cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0); in initGPIO()
98 u8 value[4] = { 0, 0, 0, 0 }; in uninitGPIO() local
103 0x68, value, 4); in uninitGPIO()
274 u8 value = 0; in cx231xx_afe_set_input_mux() local
277 status = afe_read_byte(dev, ADC_INPUT_CH1, &value); in cx231xx_afe_set_input_mux()
278 value &= ~INPUT_SEL_MASK; in cx231xx_afe_set_input_mux()
279 value |= (ch1_setting - 1) << 4; in cx231xx_afe_set_input_mux()
280 value &= 0xff; in cx231xx_afe_set_input_mux()
281 status = afe_write_byte(dev, ADC_INPUT_CH1, value); in cx231xx_afe_set_input_mux()
285 status = afe_read_byte(dev, ADC_INPUT_CH2, &value); in cx231xx_afe_set_input_mux()
286 value &= ~INPUT_SEL_MASK; in cx231xx_afe_set_input_mux()
287 value |= (ch2_setting - 1) << 4; in cx231xx_afe_set_input_mux()
288 value &= 0xff; in cx231xx_afe_set_input_mux()
289 status = afe_write_byte(dev, ADC_INPUT_CH2, value); in cx231xx_afe_set_input_mux()
295 status = afe_read_byte(dev, ADC_INPUT_CH3, &value); in cx231xx_afe_set_input_mux()
296 value &= ~INPUT_SEL_MASK; in cx231xx_afe_set_input_mux()
297 value |= (ch3_setting - 1) << 4; in cx231xx_afe_set_input_mux()
298 value &= 0xff; in cx231xx_afe_set_input_mux()
299 status = afe_write_byte(dev, ADC_INPUT_CH3, value); in cx231xx_afe_set_input_mux()
628 u32 value = 0; in cx231xx_set_decoder_video_input() local
651 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
652 value |= (0 << 13) | (1 << 4); in cx231xx_set_decoder_video_input()
653 value &= ~(1 << 5); in cx231xx_set_decoder_video_input()
656 value &= (~(0x1ff8000)); in cx231xx_set_decoder_video_input()
658 value |= 0x1000000; in cx231xx_set_decoder_video_input()
659 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
661 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
662 value |= (1 << 7); in cx231xx_set_decoder_video_input()
663 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
682 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
685 value |= FLD_VBI_GATE_EN; in cx231xx_set_decoder_video_input()
688 value |= FLD_VGA_AUTO_EN; in cx231xx_set_decoder_video_input()
691 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
708 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
711 value &= (~(0x1ff8000)); in cx231xx_set_decoder_video_input()
714 value |= 0x1000010; in cx231xx_set_decoder_video_input()
715 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
727 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
730 value |= FLD_VBI_GATE_EN; in cx231xx_set_decoder_video_input()
733 value |= FLD_VGA_AUTO_EN; in cx231xx_set_decoder_video_input()
736 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
752 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
753 value |= FLD_CHROMA_IN_SEL; /* set the chroma in select */ in cx231xx_set_decoder_video_input()
758 value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3); in cx231xx_set_decoder_video_input()
760 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
771 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
772 value |= (0 << 13) | (1 << 4); in cx231xx_set_decoder_video_input()
773 value &= ~(1 << 5); in cx231xx_set_decoder_video_input()
776 value &= (~(0x1FF8000)); in cx231xx_set_decoder_video_input()
778 value |= 0x1000000; in cx231xx_set_decoder_video_input()
779 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
781 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
782 value |= (1 << 7); in cx231xx_set_decoder_video_input()
783 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
802 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
805 value |= FLD_VBI_GATE_EN; in cx231xx_set_decoder_video_input()
808 value |= FLD_VGA_AUTO_EN; in cx231xx_set_decoder_video_input()
811 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
838 status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value); in cx231xx_set_decoder_video_input()
841 value &= ~FLD_DIF_DIF_BYPASS; in cx231xx_set_decoder_video_input()
844 status = vid_blk_write_word(dev, DIF_MISC_CTRL, value); in cx231xx_set_decoder_video_input()
847 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
850 value &= ~FLD_VBI_GATE_EN; in cx231xx_set_decoder_video_input()
854 value |= FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN | 0x00200000; in cx231xx_set_decoder_video_input()
857 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
863 value &= ~(FLD_VGA_AUTO_EN); in cx231xx_set_decoder_video_input()
866 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
869 status = vid_blk_read_word(dev, PIN_CTRL, &value); in cx231xx_set_decoder_video_input()
870 value |= (FLD_OEF_AGC_RF) | in cx231xx_set_decoder_video_input()
873 status = vid_blk_write_word(dev, PIN_CTRL, value); in cx231xx_set_decoder_video_input()
899 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
902 value &= (~(FLD_FUNC_MODE)); in cx231xx_set_decoder_video_input()
903 value |= 0x800000; in cx231xx_set_decoder_video_input()
905 value |= FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2; in cx231xx_set_decoder_video_input()
907 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
911 &value); in cx231xx_set_decoder_video_input()
913 (value & 0xFFFFFFEF)); in cx231xx_set_decoder_video_input()
928 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
929 if (value & 0x02) { in cx231xx_set_decoder_video_input()
930 value |= (1 << 19); in cx231xx_set_decoder_video_input()
931 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
1112 u32 value = 0; in cx231xx_set_audio_decoder_input() local
1122 value = cx231xx_set_field(FLD_AUD_CHAN1_SRC, in cx231xx_set_audio_decoder_input()
1124 status = vid_blk_write_word(dev, AUD_IO_CTRL, value); in cx231xx_set_audio_decoder_input()
1242 u32 value; in cx231xx_init_ctrl_pin_status() local
1245 status = vid_blk_read_word(dev, PIN_CTRL, &value); in cx231xx_init_ctrl_pin_status()
1246 value |= (~dev->board.ctl_pin_status_mask); in cx231xx_init_ctrl_pin_status()
1247 status = vid_blk_write_word(dev, PIN_CTRL, value); in cx231xx_init_ctrl_pin_status()
1272 u8 value[4] = { 0, 0, 0, 0 }; in cx231xx_enable_i2c_port_3() local
1284 PWR_CTL_EN, value, 4); in cx231xx_enable_i2c_port_3()
1288 current_is_port_3 = value[0] & I2C_DEMOD_EN ? true : false; in cx231xx_enable_i2c_port_3()
1295 value[0] |= I2C_DEMOD_EN; in cx231xx_enable_i2c_port_3()
1297 value[0] &= ~I2C_DEMOD_EN; in cx231xx_enable_i2c_port_3()
1300 PWR_CTL_EN, value, 4); in cx231xx_enable_i2c_port_3()
1329 u32 value = 0; in cx231xx_dump_HH_reg() local
1332 value = 0x45005390; in cx231xx_dump_HH_reg()
1333 vid_blk_write_word(dev, 0x104, value); in cx231xx_dump_HH_reg()
1336 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1337 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1342 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1343 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1348 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1349 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1353 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); in cx231xx_dump_HH_reg()
1354 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); in cx231xx_dump_HH_reg()
1356 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); in cx231xx_dump_HH_reg()
1357 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); in cx231xx_dump_HH_reg()
1363 u8 value[4] = { 0, 0, 0, 0 };
1367 value, 4);
1369 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0],
1370 value[1], value[2], value[3]);
1372 value, 4);
1374 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0],
1375 value[1], value[2], value[3]);
1377 value, 4);
1379 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0],
1380 value[1], value[2], value[3]);
1382 value, 4);
1384 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0],
1385 value[1], value[2], value[3]);
1388 value, 4);
1390 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0],
1391 value[1], value[2], value[3]);
1393 value, 4);
1395 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0],
1396 value[1], value[2], value[3]);
1398 value, 4);
1400 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0],
1401 value[1], value[2], value[3]);
1403 value, 4);
1405 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0],
1406 value[1], value[2], value[3]);
1409 value, 4);
1411 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0],
1412 value[1], value[2], value[3]);
1414 value, 4);
1416 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0],
1417 value[1], value[2], value[3]);
1419 value, 4);
1421 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],
1422 value[1], value[2], value[3]);
1424 value, 4);
1426 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0],
1427 value[1], value[2], value[3]);
1430 value, 4);
1432 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0],
1433 value[1], value[2], value[3]);
1435 value, 4);
1437 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0],
1438 value[1], value[2], value[3]);
1440 value, 4);
1442 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0],
1443 value[1], value[2], value[3]);
1445 value, 4);
1447 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0],
1448 value[1], value[2], value[3]);
1451 value, 4);
1453 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0],
1454 value[1], value[2], value[3]);
1456 value, 4);
1458 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0],
1459 value[1], value[2], value[3]);
1466 u8 value = 0; in cx231xx_Setup_AFE_for_LowIF() local
1468 afe_read_byte(dev, ADC_STATUS2_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1469 value = (value & 0xFE)|0x01; in cx231xx_Setup_AFE_for_LowIF()
1470 afe_write_byte(dev, ADC_STATUS2_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1472 afe_read_byte(dev, ADC_STATUS2_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1473 value = (value & 0xFE)|0x00; in cx231xx_Setup_AFE_for_LowIF()
1474 afe_write_byte(dev, ADC_STATUS2_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1486 afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1487 value = (value & 0xFC)|0x00; in cx231xx_Setup_AFE_for_LowIF()
1488 afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1490 afe_read_byte(dev, ADC_INPUT_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1491 value = (value & 0xF9)|0x02; in cx231xx_Setup_AFE_for_LowIF()
1492 afe_write_byte(dev, ADC_INPUT_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1494 afe_read_byte(dev, ADC_FB_FRCRST_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1495 value = (value & 0xFB)|0x04; in cx231xx_Setup_AFE_for_LowIF()
1496 afe_write_byte(dev, ADC_FB_FRCRST_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1498 afe_read_byte(dev, ADC_DCSERVO_DEM_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1499 value = (value & 0xFC)|0x03; in cx231xx_Setup_AFE_for_LowIF()
1500 afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1502 afe_read_byte(dev, ADC_CTRL_DAC1_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1503 value = (value & 0xFB)|0x04; in cx231xx_Setup_AFE_for_LowIF()
1504 afe_write_byte(dev, ADC_CTRL_DAC1_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1506 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1507 value = (value & 0xF8)|0x06; in cx231xx_Setup_AFE_for_LowIF()
1508 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1510 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1511 value = (value & 0x8F)|0x40; in cx231xx_Setup_AFE_for_LowIF()
1512 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1514 afe_read_byte(dev, ADC_PWRDN_CLAMP_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1515 value = (value & 0xDF)|0x20; in cx231xx_Setup_AFE_for_LowIF()
1516 afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1525 u8 value[4] = { 0, 0, 0, 0 }; in cx231xx_set_Colibri_For_LowIF() local
1528 value[0] = (u8) 0x6F; in cx231xx_set_Colibri_For_LowIF()
1529 value[1] = (u8) 0x6F; in cx231xx_set_Colibri_For_LowIF()
1530 value[2] = (u8) 0x6F; in cx231xx_set_Colibri_For_LowIF()
1531 value[3] = (u8) 0x6F; in cx231xx_set_Colibri_For_LowIF()
1533 PWR_CTL_EN, value, 4); in cx231xx_set_Colibri_For_LowIF()
1629 Dif_set_array[i].register_address, Dif_set_array[i].value); in cx231xx_set_DIF_bandpass()
2173 u32 value; in cx231xx_i2s_blk_initialize() local
2176 CH_PWR_CTRL1, 1, &value, 1); in cx231xx_i2s_blk_initialize()
2178 value |= 0x80; in cx231xx_i2s_blk_initialize()
2180 CH_PWR_CTRL1, 1, value, 1); in cx231xx_i2s_blk_initialize()
2192 u32 value = 0; in cx231xx_i2s_blk_update_power_control() local
2196 CH_PWR_CTRL2, 1, &value, 1); in cx231xx_i2s_blk_update_power_control()
2197 value |= 0xfe; in cx231xx_i2s_blk_update_power_control()
2199 CH_PWR_CTRL2, 1, value, 1); in cx231xx_i2s_blk_update_power_control()
2235 u8 value[4] = { 0, 0, 0, 0 }; in cx231xx_set_power_mode() local
2247 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, in cx231xx_set_power_mode()
2252 tmp = le32_to_cpu(*((__le32 *) value)); in cx231xx_set_power_mode()
2260 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2261 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2262 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2263 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2265 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2269 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2270 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2271 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2272 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2275 value, 4); in cx231xx_set_power_mode()
2279 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2280 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2281 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2282 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2284 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2293 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2294 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2295 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2296 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2298 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2303 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2304 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2305 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2306 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2308 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2314 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2315 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2316 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2317 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2319 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2324 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2325 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2326 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2327 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2329 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2335 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2336 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2337 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2338 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2340 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2358 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2359 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2360 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2361 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2363 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2368 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2369 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2370 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2371 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2373 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2378 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2379 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2380 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2381 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2383 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2389 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2390 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2391 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2392 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2394 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2399 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2400 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2401 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2402 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2404 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2428 value[0] = (u8) tmp; in cx231xx_set_power_mode()
2429 value[1] = (u8) (tmp >> 8); in cx231xx_set_power_mode()
2430 value[2] = (u8) (tmp >> 16); in cx231xx_set_power_mode()
2431 value[3] = (u8) (tmp >> 24); in cx231xx_set_power_mode()
2433 PWR_CTL_EN, value, 4); in cx231xx_set_power_mode()
2443 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, in cx231xx_set_power_mode()
2451 u8 value[4] = { 0, 0, 0, 0 }; in cx231xx_power_suspend() local
2456 value, 4); in cx231xx_power_suspend()
2460 tmp = le32_to_cpu(*((__le32 *) value)); in cx231xx_power_suspend()
2463 value[0] = (u8) tmp; in cx231xx_power_suspend()
2464 value[1] = (u8) (tmp >> 8); in cx231xx_power_suspend()
2465 value[2] = (u8) (tmp >> 16); in cx231xx_power_suspend()
2466 value[3] = (u8) (tmp >> 24); in cx231xx_power_suspend()
2468 value, 4); in cx231xx_power_suspend()
2478 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; in cx231xx_start_stream() local
2484 value, 4); in cx231xx_start_stream()
2488 tmp = le32_to_cpu(*((__le32 *) value)); in cx231xx_start_stream()
2490 value[0] = (u8) tmp; in cx231xx_start_stream()
2491 value[1] = (u8) (tmp >> 8); in cx231xx_start_stream()
2492 value[2] = (u8) (tmp >> 16); in cx231xx_start_stream()
2493 value[3] = (u8) (tmp >> 24); in cx231xx_start_stream()
2496 value, 4); in cx231xx_start_stream()
2503 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; in cx231xx_stop_stream() local
2509 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4); in cx231xx_stop_stream()
2513 tmp = le32_to_cpu(*((__le32 *) value)); in cx231xx_stop_stream()
2515 value[0] = (u8) tmp; in cx231xx_stop_stream()
2516 value[1] = (u8) (tmp >> 8); in cx231xx_stop_stream()
2517 value[2] = (u8) (tmp >> 16); in cx231xx_stop_stream()
2518 value[3] = (u8) (tmp >> 24); in cx231xx_stop_stream()
2521 value, 4); in cx231xx_stop_stream()
2529 u32 value = 0; in cx231xx_initialize_stream_xfer() local
2567 value &= 0xFFFFFFFC; in cx231xx_initialize_stream_xfer()
2568 value |= 0x3; in cx231xx_initialize_stream_xfer()
2571 TS_MODE_REG, value); in cx231xx_initialize_stream_xfer()
2703 u32 value = 0; in cx231xx_set_gpio_direction() local
2711 value = dev->gpio_dir & (~(1 << pin_number)); /* clear */ in cx231xx_set_gpio_direction()
2713 value = dev->gpio_dir | (1 << pin_number); in cx231xx_set_gpio_direction()
2715 status = cx231xx_set_gpio_bit(dev, value, dev->gpio_val); in cx231xx_set_gpio_direction()
2718 dev->gpio_dir = value; in cx231xx_set_gpio_direction()
2737 u32 value = 0; in cx231xx_set_gpio_value() local
2746 value = dev->gpio_dir | (1 << pin_number); in cx231xx_set_gpio_value()
2747 dev->gpio_dir = value; in cx231xx_set_gpio_value()
2750 value = 0; in cx231xx_set_gpio_value()
2754 value = dev->gpio_val & (~(1 << pin_number)); in cx231xx_set_gpio_value()
2756 value = dev->gpio_val | (1 << pin_number); in cx231xx_set_gpio_value()
2759 dev->gpio_val = value; in cx231xx_set_gpio_value()
2888 u8 value = 0; in cx231xx_gpio_i2c_read_byte() local
2911 value |= (1 << (8 - i - 1)); in cx231xx_gpio_i2c_read_byte()
2923 *buf = value & 0xff; in cx231xx_gpio_i2c_read_byte()