Lines Matching refs:r820t_write_reg_mask
428 static int r820t_write_reg_mask(struct r820t_priv *priv, u8 reg, u8 val, in r820t_write_reg_mask() function
488 rc = r820t_write_reg_mask(priv, 0x17, range->open_d, 0x08); in r820t_set_mux()
493 rc = r820t_write_reg_mask(priv, 0x1a, range->rf_mux_ploy, 0xc3); in r820t_set_mux()
519 rc = r820t_write_reg_mask(priv, 0x10, val, 0x0b); in r820t_set_mux()
530 rc = r820t_write_reg_mask(priv, 0x08, reg08, 0x3f); in r820t_set_mux()
534 rc = r820t_write_reg_mask(priv, 0x09, reg09, 0x3f); in r820t_set_mux()
581 rc = r820t_write_reg_mask(priv, 0x10, refdiv2, 0x10); in r820t_set_pll()
586 rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x0c); in r820t_set_pll()
591 rc = r820t_write_reg_mask(priv, 0x12, 0x80, 0xe0); in r820t_set_pll()
629 rc = r820t_write_reg_mask(priv, 0x10, div_num << 5, 0xe0); in r820t_set_pll()
662 rc = r820t_write_reg_mask(priv, 0x12, val, 0x08); in r820t_set_pll()
699 rc = r820t_write_reg_mask(priv, 0x12, 0x60, 0xe0); in r820t_set_pll()
714 rc = r820t_write_reg_mask(priv, 0x1a, 0x08, 0x08); in r820t_set_pll()
819 rc = r820t_write_reg_mask(priv, 0x06, pre_dect, 0x40); in r820t_sysfreq_sel()
824 rc = r820t_write_reg_mask(priv, 0x1d, lna_top, 0xc7); in r820t_sysfreq_sel()
827 rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0xf8); in r820t_sysfreq_sel()
838 rc = r820t_write_reg_mask(priv, 0x05, air_cable1_in, 0x60); in r820t_sysfreq_sel()
841 rc = r820t_write_reg_mask(priv, 0x06, cable2_in, 0x08); in r820t_sysfreq_sel()
845 rc = r820t_write_reg_mask(priv, 0x11, cp_cur, 0x38); in r820t_sysfreq_sel()
848 rc = r820t_write_reg_mask(priv, 0x17, div_buf_cur, 0x30); in r820t_sysfreq_sel()
851 rc = r820t_write_reg_mask(priv, 0x0a, filter_cur, 0x60); in r820t_sysfreq_sel()
867 rc = r820t_write_reg_mask(priv, 0x1d, 0, 0x38); in r820t_sysfreq_sel()
872 rc = r820t_write_reg_mask(priv, 0x1c, 0, 0x04); in r820t_sysfreq_sel()
877 rc = r820t_write_reg_mask(priv, 0x06, 0, 0x40); in r820t_sysfreq_sel()
882 rc = r820t_write_reg_mask(priv, 0x1a, 0x30, 0x30); in r820t_sysfreq_sel()
889 rc = r820t_write_reg_mask(priv, 0x1d, 0x18, 0x38); in r820t_sysfreq_sel()
898 rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0x04); in r820t_sysfreq_sel()
903 rc = r820t_write_reg_mask(priv, 0x1e, lna_discharge, 0x1f); in r820t_sysfreq_sel()
908 rc = r820t_write_reg_mask(priv, 0x1a, 0x20, 0x30); in r820t_sysfreq_sel()
913 rc = r820t_write_reg_mask(priv, 0x06, 0, 0x40); in r820t_sysfreq_sel()
918 rc = r820t_write_reg_mask(priv, 0x1d, lna_top, 0x38); in r820t_sysfreq_sel()
927 rc = r820t_write_reg_mask(priv, 0x1c, mixer_top, 0x04); in r820t_sysfreq_sel()
932 rc = r820t_write_reg_mask(priv, 0x1e, lna_discharge, 0x1f); in r820t_sysfreq_sel()
937 rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x30); in r820t_sysfreq_sel()
941 rc = r820t_write_reg_mask(priv, 0x10, 0x00, 0x04); in r820t_sysfreq_sel()
1068 rc = r820t_write_reg_mask(priv, 0x0c, val, 0x0f); in r820t_set_tv_standard()
1073 rc = r820t_write_reg_mask(priv, 0x13, VER_NUM, 0x3f); in r820t_set_tv_standard()
1079 rc = r820t_write_reg_mask(priv, 0x1d, 0x00, 0x38); in r820t_set_tv_standard()
1101 rc = r820t_write_reg_mask(priv, 0x0b, hp_cor, 0x60); in r820t_set_tv_standard()
1106 rc = r820t_write_reg_mask(priv, 0x0f, 0x04, 0x04); in r820t_set_tv_standard()
1111 rc = r820t_write_reg_mask(priv, 0x10, 0x00, 0x03); in r820t_set_tv_standard()
1120 rc = r820t_write_reg_mask(priv, 0x0b, 0x10, 0x10); in r820t_set_tv_standard()
1127 rc = r820t_write_reg_mask(priv, 0x0b, 0x00, 0x10); in r820t_set_tv_standard()
1132 rc = r820t_write_reg_mask(priv, 0x0f, 0x00, 0x04); in r820t_set_tv_standard()
1150 rc = r820t_write_reg_mask(priv, 0x0a, in r820t_set_tv_standard()
1156 rc = r820t_write_reg_mask(priv, 0x0b, hp_cor, 0xef); in r820t_set_tv_standard()
1162 rc = r820t_write_reg_mask(priv, 0x07, img_r, 0x80); in r820t_set_tv_standard()
1167 rc = r820t_write_reg_mask(priv, 0x06, filt_gain, 0x30); in r820t_set_tv_standard()
1172 rc = r820t_write_reg_mask(priv, 0x1e, ext_enable, 0x60); in r820t_set_tv_standard()
1177 rc = r820t_write_reg_mask(priv, 0x05, loop_through, 0x80); in r820t_set_tv_standard()
1182 rc = r820t_write_reg_mask(priv, 0x1f, lt_att, 0x80); in r820t_set_tv_standard()
1187 rc = r820t_write_reg_mask(priv, 0x0f, flt_ext_widest, 0x80); in r820t_set_tv_standard()
1192 rc = r820t_write_reg_mask(priv, 0x19, polyfil_cur, 0x60); in r820t_set_tv_standard()
1231 rc = r820t_write_reg_mask(priv, 0x05, 0x10, 0x10);
1236 rc = r820t_write_reg_mask(priv, 0x07, 0, 0x10);
1245 rc = r820t_write_reg_mask(priv, 0x0c, 0x08, 0x9f);
1262 rc = r820t_write_reg_mask(priv, 0x05, lna_index, 0x0f);
1267 rc = r820t_write_reg_mask(priv, 0x07, mix_index, 0x0f);
1272 rc = r820t_write_reg_mask(priv, 0x05, 0, 0x10);
1277 rc = r820t_write_reg_mask(priv, 0x07, 0x10, 0x10);
1282 rc = r820t_write_reg_mask(priv, 0x0c, 0x0b, 0x9f);
1398 rc = r820t_write_reg_mask(priv, 0x10, 0x0b, 0x0b); in r820t_xtal_check()
1403 rc = r820t_write_reg_mask(priv, 0x1a, 0x00, 0x0c); in r820t_xtal_check()
1408 rc = r820t_write_reg_mask(priv, 0x13, 0x7f, 0x7f); in r820t_xtal_check()
1413 rc = r820t_write_reg_mask(priv, 0x13, 0x00, 0x40); in r820t_xtal_check()
1419 rc = r820t_write_reg_mask(priv, 0x10, in r820t_xtal_check()
1455 rc = r820t_write_reg_mask(priv, 0x05, 0x20, 0x20); in r820t_imr_prepare()
1460 rc = r820t_write_reg_mask(priv, 0x07, 0, 0x10); in r820t_imr_prepare()
1465 rc = r820t_write_reg_mask(priv, 0x0a, 0x0f, 0x0f); in r820t_imr_prepare()
1470 rc = r820t_write_reg_mask(priv, 0x0b, 0x60, 0x6f); in r820t_imr_prepare()
1475 rc = r820t_write_reg_mask(priv, 0x0c, 0x0b, 0x9f); in r820t_imr_prepare()
1480 rc = r820t_write_reg_mask(priv, 0x0f, 0, 0x08); in r820t_imr_prepare()
1485 rc = r820t_write_reg_mask(priv, 0x18, 0x10, 0x10); in r820t_imr_prepare()
1490 rc = r820t_write_reg_mask(priv, 0x1c, 0x02, 0x02); in r820t_imr_prepare()
1495 rc = r820t_write_reg_mask(priv, 0x1e, 0x80, 0x80); in r820t_imr_prepare()
1500 rc = r820t_write_reg_mask(priv, 0x06, 0x20, 0x20); in r820t_imr_prepare()
1793 rc = r820t_write_reg_mask(priv, 0x0c, vga_count, 0x0f); in r820t_vga_adjust()
1867 rc = r820t_write_reg_mask(priv, 0x08, 0, 0x3f); in r820t_iq()
1871 rc = r820t_write_reg_mask(priv, 0x09, 0, 0x3f); in r820t_iq()
2120 return r820t_write_reg_mask(priv, 0x0f, enable ? 1 : 0, 0x01);