603 	outb(val, dev->cir_addr + IT87_RCR);  in it87_set_carrier_params()
606 	outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,  in it87_set_carrier_params()
644 	outb(value, dev->cir_addr + IT87_DR);  in it87_put_tx_byte()
654 	outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,  in it87_idle_rx()
658 	outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,  in it87_idle_rx()
668 	outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),  in it87_disable_rx()
672 	outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,  in it87_disable_rx()
686 	outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,  in it87_enable_rx()
693 	outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,  in it87_enable_rx()
704 	outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,  in it87_disable_tx_interrupt()
715 	outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,  in it87_enable_tx_interrupt()
725 	outb(inb(dev->cir_addr + IT87_IER) &  in it87_disable()
733 	outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),  in it87_disable()
744 	outb((inb(dev->cir_addr + IT87_IER) &  in it87_init_hardware()
749 	outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);  in it87_init_hardware()
750 	outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);  in it87_init_hardware()
753 	outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,  in it87_init_hardware()
757 	outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);  in it87_init_hardware()
760 	outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE  in it87_init_hardware()
804 	outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,  in it8708_set_carrier_params()
813 	outb(val, dev->cir_addr + IT8708_C0CFR);  in it8708_set_carrier_params()
815 	outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,  in it8708_set_carrier_params()
827 	outb(val, dev->cir_addr + IT8708_C0RCR);  in it8708_set_carrier_params()
832 	outb(val, dev->cir_addr + IT8708_C0TCR);  in it8708_set_carrier_params()
869 	outb(value, dev->cir_addr + IT8708_C0DR);  in it8708_put_tx_byte()
879 	outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,  in it8708_idle_rx()
883 	outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,  in it8708_idle_rx()
893 	outb(inb(dev->cir_addr + IT8708_C0IER) &  in it8708_disable_rx()
898 	outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,  in it8708_disable_rx()
912 	outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,  in it8708_enable_rx()
919 	outb(inb(dev->cir_addr + IT8708_C0IER)  in it8708_enable_rx()
931 	outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,  in it8708_disable_tx_interrupt()
942 	outb(inb(dev->cir_addr + IT8708_C0IER)  in it8708_enable_tx_interrupt()
953 	outb(inb(dev->cir_addr + IT8708_C0IER) &  in it8708_disable()
961 	outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),  in it8708_disable()
971 	outb(inb(dev->cir_addr + IT8708_C0IER) &  in it8708_init_hardware()
976 	outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,  in it8708_init_hardware()
979 	outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);  in it8708_init_hardware()
980 	outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,  in it8708_init_hardware()
983 	outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,  in it8708_init_hardware()
987 	outb((inb(dev->cir_addr + IT8708_C0MSTCR) &  in it8708_init_hardware()
994 	outb((inb(dev->cir_addr + IT8708_C0RCR) &  in it8708_init_hardware()
1001 	outb((inb(dev->cir_addr + IT8708_C0TCR) &  in it8708_init_hardware()
1016 	outb(index, dev->cir_addr + IT8709_RAM_IDX);  in it8709_rm()
1023 	outb(index, dev->cir_addr + IT8709_RAM_IDX);  in it8709_wm()
1024 	outb(val, dev->cir_addr + IT8709_RAM_VAL);  in it8709_wm()