282 	u32 value;  in vpif_set_mode_info()  local
284 	value = (config->eav2sav & vpifregs[config_channel_id].width_mask);  in vpif_set_mode_info()
285 	value <<= VPIF_CH_LEN_SHIFT;  in vpif_set_mode_info()
286 	value |= (config->sav2eav & vpifregs[config_channel_id].width_mask);  in vpif_set_mode_info()
287 	regw(value, vpifregs[channel_id].h_cfg);  in vpif_set_mode_info()
289 	value = (config->l1 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
290 	value <<= VPIF_CH_LEN_SHIFT;  in vpif_set_mode_info()
291 	value |= (config->l3 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
292 	regw(value, vpifregs[channel_id].v_cfg_00);  in vpif_set_mode_info()
294 	value = (config->l5 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
295 	value <<= VPIF_CH_LEN_SHIFT;  in vpif_set_mode_info()
296 	value |= (config->l7 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
297 	regw(value, vpifregs[channel_id].v_cfg_01);  in vpif_set_mode_info()
299 	value = (config->l9 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
300 	value <<= VPIF_CH_LEN_SHIFT;  in vpif_set_mode_info()
301 	value |= (config->l11 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
302 	regw(value, vpifregs[channel_id].v_cfg_02);  in vpif_set_mode_info()
304 	value = (config->vsize & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
305 	regw(value, vpifregs[channel_id].v_cfg);  in vpif_set_mode_info()
317 	u32 value, ch_nip, reg;  in config_vpif_params()  local
351 			value = regr(reg);  in config_vpif_params()
353 			value &= ~(0x3u <<  in config_vpif_params()
355 			value |= ((vpifparams->params.data_sz) <<  in config_vpif_params()
357 			regw(value, reg);  in config_vpif_params()
393 	u32 value;  in vpif_set_vbi_display_params()  local
395 	value = 0x3F8 & (vbiparams->hstart0);  in vpif_set_vbi_display_params()
396 	value |= 0x3FFFFFF & ((vbiparams->vstart0) << 16);  in vpif_set_vbi_display_params()
397 	regw(value, vpifregs[channel_id].vanc0_strt);  in vpif_set_vbi_display_params()
399 	value = 0x3F8 & (vbiparams->hstart1);  in vpif_set_vbi_display_params()
400 	value |= 0x3FFFFFF & ((vbiparams->vstart1) << 16);  in vpif_set_vbi_display_params()
401 	regw(value, vpifregs[channel_id].vanc1_strt);  in vpif_set_vbi_display_params()
403 	value = 0x3F8 & (vbiparams->hsize0);  in vpif_set_vbi_display_params()
404 	value |= 0x3FFFFFF & ((vbiparams->vsize0) << 16);  in vpif_set_vbi_display_params()
405 	regw(value, vpifregs[channel_id].vanc0_size);  in vpif_set_vbi_display_params()
407 	value = 0x3F8 & (vbiparams->hsize1);  in vpif_set_vbi_display_params()
408 	value |= 0x3FFFFFF & ((vbiparams->vsize1) << 16);  in vpif_set_vbi_display_params()
409 	regw(value, vpifregs[channel_id].vanc1_size);  in vpif_set_vbi_display_params()