Lines Matching refs:DPRAM_BASE
295 #define DPRAM_BASE 0x4000 macro
298 #define AV7110_BOOT_STATE (DPRAM_BASE + 0x3F8)
299 #define AV7110_BOOT_SIZE (DPRAM_BASE + 0x3FA)
300 #define AV7110_BOOT_BASE (DPRAM_BASE + 0x3FC)
301 #define AV7110_BOOT_BLOCK (DPRAM_BASE + 0x400)
305 #define IRQ_STATE (DPRAM_BASE + 0x0F4)
306 #define IRQ_STATE_EXT (DPRAM_BASE + 0x0F6)
307 #define MSGSTATE (DPRAM_BASE + 0x0F8)
308 #define COMMAND (DPRAM_BASE + 0x0FC)
309 #define COM_BUFF (DPRAM_BASE + 0x100)
313 #define BUFF1_BASE (DPRAM_BASE + 0x120)
316 #define DATA_BUFF0_BASE (DPRAM_BASE + 0x200)
328 #define Reserved (DPRAM_BASE + 0x1E00)
333 #define STATUS_BASE (DPRAM_BASE + 0x1FC0)
341 #define RX_TYPE (DPRAM_BASE + 0x1FE8)
342 #define RX_LEN (DPRAM_BASE + 0x1FEA)
343 #define TX_TYPE (DPRAM_BASE + 0x1FEC)
344 #define TX_LEN (DPRAM_BASE + 0x1FEE)
346 #define RX_BUFF (DPRAM_BASE + 0x1FF4)
347 #define TX_BUFF (DPRAM_BASE + 0x1FF6)
349 #define HANDSHAKE_REG (DPRAM_BASE + 0x1FF8)
350 #define COM_IF_LOCK (DPRAM_BASE + 0x1FFA)
352 #define IRQ_RX (DPRAM_BASE + 0x1FFC)
353 #define IRQ_TX (DPRAM_BASE + 0x1FFE)