Lines Matching refs:saa7146_write
1211 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */ in stop_ts_capture()
1230 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ in start_ts_capture()
2404 saa7146_write(dev, MC1, MASK_31); in av7110_attach()
2410 saa7146_write(dev, DD1_STREAM_B, 0); in av7110_attach()
2412 saa7146_write(dev, DD1_INIT, 0x00000200); in av7110_attach()
2413 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI in av7110_attach()
2414 saa7146_write(dev, MC2, in av7110_attach()
2426 saa7146_write(dev, MC1, MASK_29); in av7110_attach()
2428 saa7146_write(dev, RPS_TOV1, 0); in av7110_attach()
2447 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); in av7110_attach()
2449 saa7146_write(dev, ECT1R, 0x3fff ); in av7110_attach()
2452 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); in av7110_attach()
2454 saa7146_write(dev, MC1, (MASK_13 | MASK_29 )); in av7110_attach()
2468 saa7146_write(dev, MC1, ( MASK_29 )); in av7110_attach()
2496 saa7146_write(dev, GPIO_CTRL, 0x500000); in av7110_attach()
2529 saa7146_write(dev, DD1_STREAM_B, 0x00000000); in av7110_attach()
2530 saa7146_write(dev, MC2, (MASK_10 | MASK_26)); in av7110_attach()
2532 saa7146_write(dev, DD1_INIT, 0x00000600); in av7110_attach()
2533 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); in av7110_attach()
2535 saa7146_write(dev, BRS_CTRL, 0x60000000); in av7110_attach()
2536 saa7146_write(dev, MC2, MASK_08 | MASK_24); in av7110_attach()
2539 saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000)); in av7110_attach()
2540 saa7146_write(dev, BASE_ODD3, 0); in av7110_attach()
2541 saa7146_write(dev, BASE_EVEN3, 0); in av7110_attach()
2542 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT); in av7110_attach()
2543 saa7146_write(dev, PITCH3, TS_WIDTH); in av7110_attach()
2544 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90); in av7110_attach()
2545 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH); in av7110_attach()
2546 saa7146_write(dev, MC2, MASK_04 | MASK_20); in av7110_attach()
2557 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f); in av7110_attach()
2558 saa7146_write(dev, BCS_CTRL, 0x80400040); in av7110_attach()
2560 saa7146_write(dev, DD1_STREAM_B, 0x00000000); in av7110_attach()
2561 saa7146_write(dev, DD1_INIT, 0x03000200); in av7110_attach()
2562 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); in av7110_attach()
2563 saa7146_write(dev, BRS_CTRL, 0x60000000); in av7110_attach()
2564 saa7146_write(dev, BASE_ODD3, 0); in av7110_attach()
2565 saa7146_write(dev, BASE_EVEN3, 0); in av7110_attach()
2566 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT); in av7110_attach()
2567 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90); in av7110_attach()
2569 saa7146_write(dev, PITCH3, TS_WIDTH); in av7110_attach()
2570 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH); in av7110_attach()
2573 saa7146_write(dev, MC2, 0x077c077c); in av7110_attach()
2574 saa7146_write(dev, GPIO_CTRL, 0x000000); in av7110_attach()
2580 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); in av7110_attach()
2582 saa7146_write(dev, ECT1R, 0x3fff ); in av7110_attach()
2614 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); in av7110_attach()
2623 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 ); in av7110_attach()
2626 saa7146_write(dev, MC1, (MASK_13 | MASK_29)); in av7110_attach()
2631 saa7146_write(dev, PCI_BT_V1, 0x1c00101f); in av7110_attach()
2632 saa7146_write(dev, BCS_CTRL, 0x80400040); in av7110_attach()
2635 saa7146_write(dev, DD1_STREAM_B, 0x00000000); in av7110_attach()
2636 saa7146_write(dev, DD1_INIT, 0x03000000); in av7110_attach()
2637 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); in av7110_attach()
2640 saa7146_write(dev, MC2, 0x077c077c); in av7110_attach()
2641 saa7146_write(dev, GPIO_CTRL, 0x000000); in av7110_attach()
2781 saa7146_write(saa, MC1, MASK_29); in av7110_detach()
2785 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */ in av7110_detach()