88 	ddbwritel((adr << 9) | cmd, i2c->regs + I2C_COMMAND);  in ddb_i2c_cmd()
95 			ddbwritel(istat, INTERRUPT_ACK);  in ddb_i2c_cmd()
119 		ddbwritel(msg[0].len|(msg[1].len << 16),  in ddb_i2c_master_xfer()
131 		ddbwritel(msg[0].len, i2c->regs + I2C_TASKLENGTH);  in ddb_i2c_master_xfer()
136 		ddbwritel(msg[0].len << 16, i2c->regs + I2C_TASKLENGTH);  in ddb_i2c_master_xfer()
183 		ddbwritel(I2C_SPEED_100, i2c->regs + I2C_TIMING);  in ddb_i2c_init()
184 		ddbwritel((i2c->rbuf << 16) | i2c->wbuf,  in ddb_i2c_init()
229 		ddbwritel(mem & 0xffffffff, base + i * 8);
230 		ddbwritel(mem >> 32, base + i * 8 + 4);
246 			ddbwritel(mem & 0xffffffff, base + j * 8);  in ddb_address_table()
247 			ddbwritel(mem >> 32, base + j * 8 + 4);  in ddb_address_table()
255 			ddbwritel(mem & 0xffffffff, base + j * 8);  in ddb_address_table()
256 			ddbwritel(mem >> 32, base + j * 8 + 4);  in ddb_address_table()
358 	ddbwritel(0, TS_INPUT_CONTROL(input->nr));  in ddb_input_start()
359 	ddbwritel(2, TS_INPUT_CONTROL(input->nr));  in ddb_input_start()
360 	ddbwritel(0, TS_INPUT_CONTROL(input->nr));  in ddb_input_start()
362 	ddbwritel((1 << 16) |  in ddb_input_start()
366 	ddbwritel(0, DMA_BUFFER_ACK(input->nr));  in ddb_input_start()
368 	ddbwritel(1, DMA_BASE_WRITE);  in ddb_input_start()
369 	ddbwritel(3, DMA_BUFFER_CONTROL(input->nr));  in ddb_input_start()
370 	ddbwritel(9, TS_INPUT_CONTROL(input->nr));  in ddb_input_start()
380 	ddbwritel(0, TS_INPUT_CONTROL(input->nr));  in ddb_input_stop()
381 	ddbwritel(0, DMA_BUFFER_CONTROL(input->nr));  in ddb_input_stop()
393 	ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));  in ddb_output_start()
394 	ddbwritel(2, TS_OUTPUT_CONTROL(output->nr));  in ddb_output_start()
395 	ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));  in ddb_output_start()
396 	ddbwritel(0x3c, TS_OUTPUT_CONTROL(output->nr));  in ddb_output_start()
397 	ddbwritel((1 << 16) |  in ddb_output_start()
401 	ddbwritel(0, DMA_BUFFER_ACK(output->nr + 8));  in ddb_output_start()
403 	ddbwritel(1, DMA_BASE_READ);  in ddb_output_start()
404 	ddbwritel(3, DMA_BUFFER_CONTROL(output->nr + 8));  in ddb_output_start()
406 	ddbwritel(0x1d, TS_OUTPUT_CONTROL(output->nr));  in ddb_output_start()
416 	ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));  in ddb_output_stop()
417 	ddbwritel(0, DMA_BUFFER_CONTROL(output->nr + 8));  in ddb_output_stop()
484 		ddbwritel((output->cbuf << 11) | (output->coff >> 7),  in ddb_output_write()
501 		ddbwritel(input->stat, DMA_BUFFER_ACK(input->nr));  in ddb_input_avail()
534 		ddbwritel((input->cbuf << 11) | (input->coff >> 7),  in ddb_input_read()
1013 			ddbwritel((input->cbuf << 11),  in input_tasklet()
1180 		ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);  in ddb_port_probe()
1185 		ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);  in ddb_port_probe()
1190 		ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);  in ddb_port_probe()
1195 		ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);  in ddb_port_probe()
1210 	ddbwritel(0, TS_INPUT_CONTROL(nr));  in ddb_input_init()
1211 	ddbwritel(2, TS_INPUT_CONTROL(nr));  in ddb_input_init()
1212 	ddbwritel(0, TS_INPUT_CONTROL(nr));  in ddb_input_init()
1213 	ddbwritel(0, DMA_BUFFER_ACK(nr));  in ddb_input_init()
1228 	ddbwritel(0, TS_OUTPUT_CONTROL(nr));  in ddb_output_init()
1229 	ddbwritel(2, TS_OUTPUT_CONTROL(nr));  in ddb_output_init()
1230 	ddbwritel(0, TS_OUTPUT_CONTROL(nr));  in ddb_output_init()
1292 		ddbwritel(s, INTERRUPT_ACK);  in irq_handler()
1344 		ddbwritel(1, SPI_CONTROL);  in flashio()
1350 		ddbwritel(data, SPI_DATA);  in flashio()
1356 		ddbwritel(0x0001 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);  in flashio()
1358 		ddbwritel(0x0003 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);  in flashio()
1370 	ddbwritel(data, SPI_DATA);  in flashio()
1375 		ddbwritel(0, SPI_CONTROL);  in flashio()
1379 		ddbwritel(1, SPI_CONTROL);  in flashio()
1382 		ddbwritel(0xffffffff, SPI_DATA);  in flashio()
1390 	ddbwritel(0x0003 | ((rlen << (8 + 3)) & 0x1F00), SPI_CONTROL);  in flashio()
1391 	ddbwritel(0xffffffff, SPI_DATA);  in flashio()
1396 	ddbwritel(0, SPI_CONTROL);  in flashio()
1547 	ddbwritel(0, INTERRUPT_ENABLE);  in ddb_remove()
1604 	ddbwritel(0, DMA_BASE_WRITE);  in ddb_probe()
1605 	ddbwritel(0, DMA_BASE_READ);  in ddb_probe()
1606 	ddbwritel(0xffffffff, INTERRUPT_ACK);  in ddb_probe()
1607 	ddbwritel(0xfff0f, INTERRUPT_ENABLE);  in ddb_probe()
1608 	ddbwritel(0, MSI1_ENABLE);  in ddb_probe()