Lines Matching refs:dprintk
51 #define dprintk(level, fmt, arg...)\ macro
432 dprintk(1, "[%p/%d] wakeup reg=%d buf=%d\n", buf, in cx23885_wakeup()
447 dprintk(1, "%s() Erasing channel [%s]\n", __func__, in cx23885_sram_channel_setup()
455 dprintk(1, "%s() Configuring channel [%s]\n", __func__, in cx23885_sram_channel_setup()
472 dprintk(2, "%s() 0x%08x <- 0x%08x\n", __func__, cdt + 16*i, in cx23885_sram_channel_setup()
502 dprintk(2, "[bridge %d] sram setup %s: bpl=%d lines=%d\n", in cx23885_sram_channel_setup()
624 dprintk(1, "%s()\n", __func__); in cx23885_reset()
658 dprintk(1, "%s()\n", __func__); in cx23885_pci_quirks()
686 dprintk(1, "%s(portno=%d)\n", __func__, portno); in cx23885_init_tsport()
855 dprintk(1, "%s() Memory configured for PCIe bridge type %d\n", in cx23885_dev_setup()
948 dprintk(1, "%s() tuner_type = 0x%x tuner_addr = 0x%x tuner_bus = %d\n", in cx23885_dev_setup()
950 dprintk(1, "%s() radio_type = 0x%x radio_addr = 0x%x\n", in cx23885_dev_setup()
1261 dprintk(1, "%s() Register Dump\n", __func__); in cx23885_tsport_reg_dump()
1262 dprintk(1, "%s() DEV_CNTRL2 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1264 dprintk(1, "%s() PCI_INT_MSK 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1266 dprintk(1, "%s() AUD_INT_INT_MSK 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1268 dprintk(1, "%s() AUD_INT_DMA_CTL 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1270 dprintk(1, "%s() AUD_EXT_INT_MSK 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1272 dprintk(1, "%s() AUD_EXT_DMA_CTL 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1274 dprintk(1, "%s() PAD_CTRL 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1276 dprintk(1, "%s() ALT_PIN_OUT_SEL 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1278 dprintk(1, "%s() GPIO2 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1280 dprintk(1, "%s() gpcnt(0x%08X) 0x%08X\n", __func__, in cx23885_tsport_reg_dump()
1282 dprintk(1, "%s() gpcnt_ctl(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1284 dprintk(1, "%s() dma_ctl(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1287 dprintk(1, "%s() src_sel(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1289 dprintk(1, "%s() lngth(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1291 dprintk(1, "%s() hw_sop_ctrl(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1293 dprintk(1, "%s() gen_ctrl(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1295 dprintk(1, "%s() bd_pkt_status(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1297 dprintk(1, "%s() sop_status(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1299 dprintk(1, "%s() fifo_ovfl_stat(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1301 dprintk(1, "%s() vld_misc(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1303 dprintk(1, "%s() ts_clk_en(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1305 dprintk(1, "%s() ts_int_msk(0x%08X) 0x%08x\n", __func__, in cx23885_tsport_reg_dump()
1316 dprintk(1, "%s() w: %d, h: %d, f: %d\n", __func__, in cx23885_start_dma()
1398 dprintk(1, "%s() enabling TS int's and DMA\n", __func__); in cx23885_start_dma()
1424 dprintk(1, "%s()\n", __func__); in cx23885_stop_dma()
1459 dprintk(1, "%s: %p\n", __func__, buf); in cx23885_buf_prepare()
1506 dprintk(1, "[%p/%d] %s - first active\n", in cx23885_buf_queue()
1514 dprintk(1, "[%p/%d] %s - append to active\n", in cx23885_buf_queue()
1535 dprintk(1, "[%p/%d] %s - dma=0x%08lx\n", in do_cancel_buffers()
1546 dprintk(1, "%s()\n", __func__); in cx23885_cancel_buffers()
1562 dprintk(7, "status: 0x%08x mask: 0x%08x count: 0x%x\n", in cx23885_irq_417()
1575 dprintk(1, " VID_B_MSK_BAD_PKT\n"); in cx23885_irq_417()
1577 dprintk(1, " VID_B_MSK_OPC_ERR\n"); in cx23885_irq_417()
1579 dprintk(1, " VID_B_MSK_VBI_OPC_ERR\n"); in cx23885_irq_417()
1581 dprintk(1, " VID_B_MSK_SYNC\n"); in cx23885_irq_417()
1583 dprintk(1, " VID_B_MSK_VBI_SYNC\n"); in cx23885_irq_417()
1585 dprintk(1, " VID_B_MSK_OF\n"); in cx23885_irq_417()
1587 dprintk(1, " VID_B_MSK_VBI_OF\n"); in cx23885_irq_417()
1594 dprintk(7, " VID_B_MSK_RISCI1\n"); in cx23885_irq_417()
1619 dprintk(7, " (VID_BC_MSK_OPC_ERR 0x%08x)\n", in cx23885_irq_ts()
1623 dprintk(7, " (VID_BC_MSK_BAD_PKT 0x%08x)\n", in cx23885_irq_ts()
1627 dprintk(7, " (VID_BC_MSK_SYNC 0x%08x)\n", in cx23885_irq_ts()
1631 dprintk(7, " (VID_BC_MSK_OF 0x%08x)\n", in cx23885_irq_ts()
1642 dprintk(7, " (RISCI1 0x%08x)\n", VID_BC_MSK_RISCI1); in cx23885_irq_ts()
1690 dprintk(7, "pci_status: 0x%08x pci_mask: 0x%08x\n", in cx23885_irq()
1692 dprintk(7, "vida_status: 0x%08x vida_mask: 0x%08x count: 0x%x\n", in cx23885_irq()
1694 dprintk(7, "audint_status: 0x%08x audint_mask: 0x%08x count: 0x%x\n", in cx23885_irq()
1696 dprintk(7, "ts1_status: 0x%08x ts1_mask: 0x%08x count: 0x%x\n", in cx23885_irq()
1698 dprintk(7, "ts2_status: 0x%08x ts2_mask: 0x%08x count: 0x%x\n", in cx23885_irq()
1709 dprintk(7, " (PCI_MSK_RISC_RD 0x%08x)\n", in cx23885_irq()
1713 dprintk(7, " (PCI_MSK_RISC_WR 0x%08x)\n", in cx23885_irq()
1717 dprintk(7, " (PCI_MSK_AL_RD 0x%08x)\n", in cx23885_irq()
1721 dprintk(7, " (PCI_MSK_AL_WR 0x%08x)\n", in cx23885_irq()
1725 dprintk(7, " (PCI_MSK_APB_DMA 0x%08x)\n", in cx23885_irq()
1729 dprintk(7, " (PCI_MSK_VID_C 0x%08x)\n", in cx23885_irq()
1733 dprintk(7, " (PCI_MSK_VID_B 0x%08x)\n", in cx23885_irq()
1737 dprintk(7, " (PCI_MSK_VID_A 0x%08x)\n", in cx23885_irq()
1741 dprintk(7, " (PCI_MSK_AUD_INT 0x%08x)\n", in cx23885_irq()
1745 dprintk(7, " (PCI_MSK_AUD_EXT 0x%08x)\n", in cx23885_irq()
1749 dprintk(7, " (PCI_MSK_GPIO0 0x%08x)\n", in cx23885_irq()
1753 dprintk(7, " (PCI_MSK_GPIO1 0x%08x)\n", in cx23885_irq()
1757 dprintk(7, " (PCI_MSK_AV_CORE 0x%08x)\n", in cx23885_irq()
1761 dprintk(7, " (PCI_MSK_IR 0x%08x)\n", in cx23885_irq()