1877 	struct cx23885_tsport *ts2 = &dev->ts2;  in cx23885_card_setup()  local
1930 		ts2->gen_ctrl_val  = 0x10e;  in cx23885_card_setup()
1931 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
1932 		ts2->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
1937 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
1938 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
1939 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
1960 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
1961 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
1962 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
1987 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
1988 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
1989 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
1996 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
1997 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
1998 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
2012 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
2013 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
2014 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
2020 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
2021 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
2022 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
2034 		ts2->gen_ctrl_val  = 0x8; /* Serial bus */  in cx23885_card_setup()
2035 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
2036 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
2042 		ts2->gen_ctrl_val  = 0xe; /* Serial bus */  in cx23885_card_setup()
2043 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
2044 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
2050 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
2051 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
2052 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()
2075 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */  in cx23885_card_setup()
2076 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */  in cx23885_card_setup()
2077 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;  in cx23885_card_setup()