244 static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_dma_done()  argument
253 	mb = &order->mb;  in epu_dma_done()
260 			  (order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) ?  in epu_dma_done()
266 	mdl_ack = order->mdl_ack;  in epu_dma_done()
290 		if ((order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) &&  in epu_dma_done()
338 static void epu_debug(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_debug()  argument
341 	char *str = order->str;  in epu_debug()
343 	CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str);  in epu_debug()
349 static void epu_cmd(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_cmd()  argument
351 	switch (order->rpu) {  in epu_cmd()
354 		switch (order->mb.cmd) {  in epu_cmd()
356 			epu_dma_done(cx, order);  in epu_cmd()
359 			epu_debug(cx, order);  in epu_cmd()
363 				  order->mb.cmd);  in epu_cmd()
370 			  order->mb.cmd);  in epu_cmd()
378 void free_in_work_order(struct cx18 *cx, struct cx18_in_work_order *order)  in free_in_work_order()  argument
380 	atomic_set(&order->pending, 0);  in free_in_work_order()
385 	struct cx18_in_work_order *order =  in cx18_in_work_handler()  local
387 	struct cx18 *cx = order->cx;  in cx18_in_work_handler()
388 	epu_cmd(cx, order);  in cx18_in_work_handler()
389 	free_in_work_order(cx, order);  in cx18_in_work_handler()
397 static void mb_ack_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in mb_ack_irq()  argument
402 	switch (order->rpu) {  in mb_ack_irq()
413 			  order->rpu, order->mb.cmd);  in mb_ack_irq()
417 	req = order->mb.request;  in mb_ack_irq()
424 				rpu_str[order->rpu], rpu_str[order->rpu], req);  in mb_ack_irq()
425 		order->flags |= CX18_F_EWO_MB_STALE_WHILE_PROC;  in mb_ack_irq()
433 static int epu_dma_done_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_dma_done_irq()  argument
439 	mb = &order->mb;  in epu_dma_done_irq()
446 		if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_dma_done_irq()
447 			mb_ack_irq(cx, order);  in epu_dma_done_irq()
452 		((u32 *)order->mdl_ack)[i / sizeof(u32)] =  in epu_dma_done_irq()
455 	if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_dma_done_irq()
456 		mb_ack_irq(cx, order);  in epu_dma_done_irq()
461 int epu_debug_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_debug_irq()  argument
464 	char *str = order->str;  in epu_debug_irq()
467 	str_offset = order->mb.args[1];  in epu_debug_irq()
475 	if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_debug_irq()
476 		mb_ack_irq(cx, order);  in epu_debug_irq()
482 int epu_cmd_irq(struct cx18 *cx, struct cx18_in_work_order *order)  in epu_cmd_irq()  argument
486 	switch (order->rpu) {  in epu_cmd_irq()
489 		switch (order->mb.cmd) {  in epu_cmd_irq()
491 			ret = epu_dma_done_irq(cx, order);  in epu_cmd_irq()
494 			ret = epu_debug_irq(cx, order);  in epu_cmd_irq()
498 				  order->mb.cmd);  in epu_cmd_irq()
505 			  order->mb.cmd);  in epu_cmd_irq()
517 	struct cx18_in_work_order *order = NULL;  in alloc_in_work_order_irq()  local
529 			order = &cx->in_work_order[i];  in alloc_in_work_order_irq()
530 			atomic_set(&order->pending, 1);  in alloc_in_work_order_irq()
534 	return order;  in alloc_in_work_order_irq()
541 	struct cx18_in_work_order *order;  in cx18_api_epu_cmd_irq()  local
556 	order = alloc_in_work_order_irq(cx);  in cx18_api_epu_cmd_irq()
557 	if (order == NULL) {  in cx18_api_epu_cmd_irq()
563 	order->flags = 0;  in cx18_api_epu_cmd_irq()
564 	order->rpu = rpu;  in cx18_api_epu_cmd_irq()
565 	order_mb = &order->mb;  in cx18_api_epu_cmd_irq()
582 		order->flags = CX18_F_EWO_MB_STALE_UPON_RECEIPT;  in cx18_api_epu_cmd_irq()
589 	submit = epu_cmd_irq(cx, order);  in cx18_api_epu_cmd_irq()
591 		queue_work(cx->in_work_queue, &order->work);  in cx18_api_epu_cmd_irq()