Lines Matching refs:sd

52 	struct v4l2_subdev sd;  member
63 static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd) in to_mt9v011() argument
65 return container_of(sd, struct mt9v011, sd); in to_mt9v011()
68 static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr) in mt9v011_read() argument
70 struct i2c_client *c = v4l2_get_subdevdata(sd); in mt9v011_read()
76 v4l2_dbg(0, debug, sd, in mt9v011_read()
83 v4l2_dbg(0, debug, sd, in mt9v011_read()
88 v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val); in mt9v011_read()
93 static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr, in mt9v011_write() argument
96 struct i2c_client *c = v4l2_get_subdevdata(sd); in mt9v011_write()
104 v4l2_dbg(2, debug, sd, in mt9v011_write()
108 v4l2_dbg(0, debug, sd, in mt9v011_write()
173 static void set_balance(struct v4l2_subdev *sd) in set_balance() argument
175 struct mt9v011 *core = to_mt9v011(sd); in set_balance()
192 mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain); in set_balance()
193 mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain); in set_balance()
194 mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain); in set_balance()
195 mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain); in set_balance()
196 mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure); in set_balance()
199 static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator) in calc_fps() argument
201 struct mt9v011 *core = to_mt9v011(sd); in calc_fps()
207 height = mt9v011_read(sd, R03_MT9V011_HEIGHT); in calc_fps()
208 width = mt9v011_read(sd, R04_MT9V011_WIDTH); in calc_fps()
209 hblank = mt9v011_read(sd, R05_MT9V011_HBLANK); in calc_fps()
210 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK); in calc_fps()
211 speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED); in calc_fps()
220 v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n", in calc_fps()
229 static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator) in calc_speed() argument
231 struct mt9v011 *core = to_mt9v011(sd); in calc_speed()
240 height = mt9v011_read(sd, R03_MT9V011_HEIGHT); in calc_speed()
241 width = mt9v011_read(sd, R04_MT9V011_WIDTH); in calc_speed()
242 hblank = mt9v011_read(sd, R05_MT9V011_HBLANK); in calc_speed()
243 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK); in calc_speed()
269 static void set_res(struct v4l2_subdev *sd) in set_res() argument
271 struct mt9v011 *core = to_mt9v011(sd); in set_res()
286 mt9v011_write(sd, R02_MT9V011_COLSTART, hstart); in set_res()
287 mt9v011_write(sd, R04_MT9V011_WIDTH, core->width); in set_res()
288 mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width); in set_res()
291 mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart); in set_res()
292 mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height); in set_res()
293 mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height); in set_res()
295 calc_fps(sd, NULL, NULL); in set_res()
298 static void set_read_mode(struct v4l2_subdev *sd) in set_read_mode() argument
300 struct mt9v011 *core = to_mt9v011(sd); in set_read_mode()
309 mt9v011_write(sd, R20_MT9V011_READ_MODE, mode); in set_read_mode()
312 static int mt9v011_reset(struct v4l2_subdev *sd, u32 val) in mt9v011_reset() argument
317 mt9v011_write(sd, mt9v011_init_default[i].reg, in mt9v011_reset()
320 set_balance(sd); in mt9v011_reset()
321 set_res(sd); in mt9v011_reset()
322 set_read_mode(sd); in mt9v011_reset()
327 static int mt9v011_enum_mbus_code(struct v4l2_subdev *sd, in mt9v011_enum_mbus_code() argument
338 static int mt9v011_set_fmt(struct v4l2_subdev *sd, in mt9v011_set_fmt() argument
343 struct mt9v011 *core = to_mt9v011(sd); in mt9v011_set_fmt()
357 set_res(sd); in mt9v011_set_fmt()
365 static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms) in mt9v011_g_parm() argument
374 calc_fps(sd, in mt9v011_g_parm()
381 static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms) in mt9v011_s_parm() argument
392 speed = calc_speed(sd, tpf->numerator, tpf->denominator); in mt9v011_s_parm()
394 mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed); in mt9v011_s_parm()
395 v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed); in mt9v011_s_parm()
398 calc_fps(sd, &tpf->numerator, &tpf->denominator); in mt9v011_s_parm()
404 static int mt9v011_g_register(struct v4l2_subdev *sd, in mt9v011_g_register() argument
407 reg->val = mt9v011_read(sd, reg->reg & 0xff); in mt9v011_g_register()
413 static int mt9v011_s_register(struct v4l2_subdev *sd, in mt9v011_s_register() argument
416 mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff); in mt9v011_s_register()
426 struct v4l2_subdev *sd = &core->sd; in mt9v011_s_ctrl() local
443 set_read_mode(sd); in mt9v011_s_ctrl()
447 set_read_mode(sd); in mt9v011_s_ctrl()
453 set_balance(sd); in mt9v011_s_ctrl()
495 struct v4l2_subdev *sd; in mt9v011_probe() local
506 sd = &core->sd; in mt9v011_probe()
507 v4l2_i2c_subdev_init(sd, c, &mt9v011_ops); in mt9v011_probe()
510 version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION); in mt9v011_probe()
513 v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n", in mt9v011_probe()
535 v4l2_err(sd, "control initialization error %d\n", ret); in mt9v011_probe()
539 core->sd.ctrl_handler = &core->ctrls; in mt9v011_probe()
551 v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n", in mt9v011_probe()
563 struct v4l2_subdev *sd = i2c_get_clientdata(c); in mt9v011_remove() local
564 struct mt9v011 *core = to_mt9v011(sd); in mt9v011_remove()
566 v4l2_dbg(1, debug, sd, in mt9v011_remove()
570 v4l2_device_unregister_subdev(sd); in mt9v011_remove()