Lines Matching refs:stv090x_write_reg
762 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data) in stv090x_write_reg() function
1222 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_vitclk_ctl()
1231 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_vitclk_ctl()
3932 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_sleep()
3937 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0) in stv090x_sleep()
3956 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_sleep()
3967 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_sleep()
3975 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_sleep()
3980 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0) in stv090x_sleep()
3999 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_sleep()
4010 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_sleep()
4023 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0) in stv090x_sleep()
4054 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0) in stv090x_wakeup()
4062 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_wakeup()
4067 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0) in stv090x_wakeup()
4078 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_wakeup()
4087 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_wakeup()
4095 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_wakeup()
4100 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0) in stv090x_wakeup()
4111 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_wakeup()
4120 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_wakeup()
4164 if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0) in stv090x_ldpc_mode()
4171 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4174 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4221 if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */ in stv090x_ldpc_mode()
4224 if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */ in stv090x_ldpc_mode()
4230 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4233 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4278 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0) in stv090x_set_mclk()
4308 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00); in stv0900_set_tspath()
4313 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */ in stv0900_set_tspath()
4317 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4321 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0) in stv0900_set_tspath()
4323 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0) in stv0900_set_tspath()
4325 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0) in stv0900_set_tspath()
4338 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0) in stv0900_set_tspath()
4344 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0) in stv0900_set_tspath()
4358 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10); in stv0900_set_tspath()
4363 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16); in stv0900_set_tspath()
4366 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4370 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4372 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0) in stv0900_set_tspath()
4374 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0) in stv0900_set_tspath()
4387 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14); in stv0900_set_tspath()
4392 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12); in stv0900_set_tspath()
4405 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4414 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4423 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4432 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4446 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4455 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4464 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4473 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4507 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4509 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0) in stv0900_set_tspath()
4539 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0) in stv0900_set_tspath()
4541 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0) in stv0900_set_tspath()
4547 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4550 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4555 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4558 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4575 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00); in stv0903_set_tspath()
4581 stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c); in stv0903_set_tspath()
4588 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10); in stv0903_set_tspath()
4594 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14); in stv0903_set_tspath()
4604 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4612 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4620 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4628 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4662 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0903_set_tspath()
4664 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0) in stv0903_set_tspath()
4670 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4673 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4705 if (stv090x_write_reg(state, STV090x_SYNTCTRL, in stv090x_init()
4789 if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0) in stv090x_setup()
4792 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0) in stv090x_setup()
4798 if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0) in stv090x_setup()
4801 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0) in stv090x_setup()
4806 if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0) in stv090x_setup()
4809 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0) in stv090x_setup()
4812 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */ in stv090x_setup()
4815 if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */ in stv090x_setup()
4817 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */ in stv090x_setup()
4824 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0) in stv090x_setup()
4830 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0) in stv090x_setup()
4836 if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0) in stv090x_setup()
4855 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_setup()
4862 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_setup()
4865 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0) in stv090x_setup()
4867 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0) in stv090x_setup()
4886 return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg); in stv090x_set_gpio()