Lines Matching refs:state
53 enum stv0367_cab_signal_type state; member
67 enum stv0367_ter_signal_type state; member
770 int stv0367_writeregs(struct stv0367_state *state, u16 reg, u8 *data, int len) in stv0367_writeregs() argument
774 .addr = state->config->demod_address, in stv0367_writeregs()
795 state->config->demod_address, reg, buf[2]); in stv0367_writeregs()
797 ret = i2c_transfer(state->i2c, &msg, 1); in stv0367_writeregs()
800 __func__, state->config->demod_address, reg, buf[2]); in stv0367_writeregs()
805 static int stv0367_writereg(struct stv0367_state *state, u16 reg, u8 data) in stv0367_writereg() argument
807 return stv0367_writeregs(state, reg, &data, 1); in stv0367_writereg()
810 static u8 stv0367_readreg(struct stv0367_state *state, u16 reg) in stv0367_readreg() argument
816 .addr = state->config->demod_address, in stv0367_readreg()
821 .addr = state->config->demod_address, in stv0367_readreg()
832 ret = i2c_transfer(state->i2c, msg, 2); in stv0367_readreg()
835 __func__, state->config->demod_address, reg, b1[0]); in stv0367_readreg()
839 state->config->demod_address, reg, b1[0]); in stv0367_readreg()
858 static void stv0367_writebits(struct stv0367_state *state, u32 label, u8 val) in stv0367_writebits() argument
862 reg = stv0367_readreg(state, (label >> 16) & 0xffff); in stv0367_writebits()
868 stv0367_writereg(state, (label >> 16) & 0xffff, reg); in stv0367_writebits()
883 static u8 stv0367_readbits(struct stv0367_state *state, u32 label) in stv0367_readbits() argument
890 val = stv0367_readreg(state, label >> 16); in stv0367_readbits()
908 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_gate_ctrl() local
909 u8 tmp = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_gate_ctrl()
921 stv0367_writereg(state, R367TER_I2CRPT, tmp); in stv0367ter_gate_ctrl()
1026 static u32 stv0367ter_get_mclk(struct stv0367_state *state, u32 ExtClk_Hz) in stv0367ter_get_mclk() argument
1033 if (stv0367_readbits(state, F367TER_BYPASS_PLLXN) == 0) { in stv0367ter_get_mclk()
1034 n = (u32)stv0367_readbits(state, F367TER_PLL_NDIV); in stv0367ter_get_mclk()
1038 m = (u32)stv0367_readbits(state, F367TER_PLL_MDIV); in stv0367ter_get_mclk()
1042 p = (u32)stv0367_readbits(state, F367TER_PLL_PDIV); in stv0367ter_get_mclk()
1058 static int stv0367ter_filt_coeff_init(struct stv0367_state *state, in stv0367ter_filt_coeff_init() argument
1065 freq = stv0367ter_get_mclk(state, DemodXtal); in stv0367ter_filt_coeff_init()
1077 stv0367_writebits(state, F367TER_IIR_CELL_NB, i - 1); in stv0367ter_filt_coeff_init()
1080 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
1083 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
1093 static void stv0367ter_agc_iir_lock_detect_set(struct stv0367_state *state) in stv0367ter_agc_iir_lock_detect_set() argument
1097 stv0367_writebits(state, F367TER_LOCK_DETECT_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1100 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1101 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
1102 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
1105 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x01); in stv0367ter_agc_iir_lock_detect_set()
1106 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
1107 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
1110 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x02); in stv0367ter_agc_iir_lock_detect_set()
1111 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
1112 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1115 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x03); in stv0367ter_agc_iir_lock_detect_set()
1116 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
1117 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1121 static int stv0367_iir_filt_init(struct stv0367_state *state, u8 Bandwidth, in stv0367_iir_filt_init() argument
1126 stv0367_writebits(state, F367TER_NRST_IIR, 0); in stv0367_iir_filt_init()
1130 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
1136 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
1142 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
1151 stv0367_writebits(state, F367TER_NRST_IIR, 1); in stv0367_iir_filt_init()
1156 static void stv0367ter_agc_iir_rst(struct stv0367_state *state) in stv0367ter_agc_iir_rst() argument
1163 com_n = stv0367_readbits(state, F367TER_COM_N); in stv0367ter_agc_iir_rst()
1165 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_agc_iir_rst()
1167 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x00); in stv0367ter_agc_iir_rst()
1168 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x00); in stv0367ter_agc_iir_rst()
1170 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x01); in stv0367ter_agc_iir_rst()
1171 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x01); in stv0367ter_agc_iir_rst()
1173 stv0367_writebits(state, F367TER_COM_N, com_n); in stv0367ter_agc_iir_rst()
1200 stv0367_ter_signal_type stv0367ter_check_syr(struct stv0367_state *state) in stv0367ter_check_syr() argument
1208 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
1213 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
1228 stv0367_ter_signal_type stv0367ter_check_cpamp(struct stv0367_state *state, in stv0367ter_check_cpamp() argument
1257 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
1261 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
1277 stv0367ter_lock_algo(struct stv0367_state *state) in stv0367ter_lock_algo() argument
1286 if (state == NULL) in stv0367ter_lock_algo()
1293 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_lock_algo()
1295 if (state->config->if_iq_mode != 0) in stv0367ter_lock_algo()
1296 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_lock_algo()
1298 stv0367_writebits(state, F367TER_GUARD, 3);/* suggest 2k 1/4 */ in stv0367ter_lock_algo()
1299 stv0367_writebits(state, F367TER_MODE, 0); in stv0367ter_lock_algo()
1300 stv0367_writebits(state, F367TER_SYR_TR_DIS, 0); in stv0367ter_lock_algo()
1303 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_lock_algo()
1306 if (stv0367ter_check_syr(state) == FE_TER_NOSYMBOL) in stv0367ter_lock_algo()
1311 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_lock_algo()
1312 if (stv0367ter_check_cpamp(state, mode) == in stv0367ter_lock_algo()
1323 tmp = stv0367_readreg(state, R367TER_SYR_STAT); in stv0367ter_lock_algo()
1324 tmp2 = stv0367_readreg(state, R367TER_STATUS); in stv0367ter_lock_algo()
1325 dprintk("state=%p\n", state); in stv0367ter_lock_algo()
1329 tmp = stv0367_readreg(state, R367TER_PRVIT); in stv0367ter_lock_algo()
1330 tmp2 = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_lock_algo()
1333 tmp = stv0367_readreg(state, R367TER_GAIN_SRC1); in stv0367ter_lock_algo()
1348 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
1349 stv0367_writereg(state, R367TER_CHC_CTL, 0x01); in stv0367ter_lock_algo()
1353 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
1354 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
1363 stv0367_writebits(state, F367TER_RST_SFEC, 1); in stv0367ter_lock_algo()
1364 stv0367_writebits(state, F367TER_RST_REEDSOLO, 1); in stv0367ter_lock_algo()
1366 stv0367_writebits(state, F367TER_RST_SFEC, 0); in stv0367ter_lock_algo()
1367 stv0367_writebits(state, F367TER_RST_REEDSOLO, 0); in stv0367ter_lock_algo()
1369 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
1370 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
1371 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
1381 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
1382 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
1383 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
1397 guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_lock_algo()
1398 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
1402 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
1404 stv0367_writebits(state, F367TER_SYR_FILTER, 0); in stv0367ter_lock_algo()
1408 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
1410 stv0367_writebits(state, F367TER_SYR_FILTER, 1); in stv0367ter_lock_algo()
1418 if ((stv0367_readbits(state, F367TER_TPS_CONST) == 2) && in stv0367ter_lock_algo()
1420 (stv0367_readbits(state, F367TER_TPS_HPCODE) != 0)) { in stv0367ter_lock_algo()
1421 stv0367_writereg(state, R367TER_SFDLYSETH, 0xc0); in stv0367ter_lock_algo()
1422 stv0367_writereg(state, R367TER_SFDLYSETM, 0x60); in stv0367ter_lock_algo()
1423 stv0367_writereg(state, R367TER_SFDLYSETL, 0x0); in stv0367ter_lock_algo()
1425 stv0367_writereg(state, R367TER_SFDLYSETH, 0x0); in stv0367ter_lock_algo()
1428 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
1433 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
1451 stv0367_writebits(state, F367TER_SYR_TR_DIS, 1); in stv0367ter_lock_algo()
1459 static void stv0367ter_set_ts_mode(struct stv0367_state *state, in stv0367ter_set_ts_mode() argument
1465 if (state == NULL) in stv0367ter_set_ts_mode()
1468 stv0367_writebits(state, F367TER_TS_DIS, 0); in stv0367ter_set_ts_mode()
1473 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 0); in stv0367ter_set_ts_mode()
1474 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 0); in stv0367ter_set_ts_mode()
1477 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 1); in stv0367ter_set_ts_mode()
1478 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 1); in stv0367ter_set_ts_mode()
1483 static void stv0367ter_set_clk_pol(struct stv0367_state *state, in stv0367ter_set_clk_pol() argument
1489 if (state == NULL) in stv0367ter_set_clk_pol()
1494 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 1); in stv0367ter_set_clk_pol()
1497 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
1501 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
1507 static void stv0367ter_core_sw(struct stv0367_state *state)
1512 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
1513 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
1519 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_standby() local
1524 stv0367_writebits(state, F367TER_STDBY, 1); in stv0367ter_standby()
1525 stv0367_writebits(state, F367TER_STDBY_FEC, 1); in stv0367ter_standby()
1526 stv0367_writebits(state, F367TER_STDBY_CORE, 1); in stv0367ter_standby()
1528 stv0367_writebits(state, F367TER_STDBY, 0); in stv0367ter_standby()
1529 stv0367_writebits(state, F367TER_STDBY_FEC, 0); in stv0367ter_standby()
1530 stv0367_writebits(state, F367TER_STDBY_CORE, 0); in stv0367ter_standby()
1543 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_init() local
1544 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_init()
1552 stv0367_writereg(state, def0367ter[i].addr, in stv0367ter_init()
1555 switch (state->config->xtal) { in stv0367ter_init()
1558 stv0367_writereg(state, R367TER_PLLMDIV, 0x2); in stv0367ter_init()
1559 stv0367_writereg(state, R367TER_PLLNDIV, 0x1b); in stv0367ter_init()
1560 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367ter_init()
1563 stv0367_writereg(state, R367TER_PLLMDIV, 0xa); in stv0367ter_init()
1564 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367ter_init()
1565 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367ter_init()
1570 stv0367_writereg(state, R367TER_PLLMDIV, 0x1); in stv0367ter_init()
1571 stv0367_writereg(state, R367TER_PLLNDIV, 0x8); in stv0367ter_init()
1572 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367ter_init()
1575 stv0367_writereg(state, R367TER_PLLMDIV, 0xc); in stv0367ter_init()
1576 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367ter_init()
1577 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367ter_init()
1581 stv0367_writereg(state, R367TER_I2CRPT, 0xa0); in stv0367ter_init()
1582 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ter_init()
1585 stv0367ter_set_ts_mode(state, state->config->ts_mode); in stv0367ter_init()
1586 stv0367ter_set_clk_pol(state, state->config->clk_pol); in stv0367ter_init()
1588 state->chip_id = stv0367_readreg(state, R367TER_ID); in stv0367ter_init()
1598 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_algo() local
1599 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_algo()
1611 + stv0367_readbits(state, F367TER_FORCE) * 2; in stv0367ter_algo()
1612 ter_state->if_iq_mode = state->config->if_iq_mode; in stv0367ter_algo()
1613 switch (state->config->if_iq_mode) { in stv0367ter_algo()
1616 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1617 stv0367_writebits(state, F367TER_LONGPATH_IF, 0); in stv0367ter_algo()
1618 stv0367_writebits(state, F367TER_DEMUX_SWAP, 0); in stv0367ter_algo()
1622 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1623 stv0367_writebits(state, F367TER_LONGPATH_IF, 1); in stv0367ter_algo()
1624 stv0367_writebits(state, F367TER_DEMUX_SWAP, 1); in stv0367ter_algo()
1628 stv0367_writebits(state, F367TER_TUNER_BB, 1); in stv0367ter_algo()
1629 stv0367_writebits(state, F367TER_PPM_INVSEL, 0); in stv0367ter_algo()
1643 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1646 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1653 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1656 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1664 stv0367ter_agc_iir_lock_detect_set(state); in stv0367ter_algo()
1668 stv0367_writebits(state, F367TER_SEL_IQNTAR, 1); in stv0367ter_algo()
1669 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1673 stv0367_writebits(state, F367TER_SEL_IQNTAR, 0); in stv0367ter_algo()
1674 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1677 if (!stv0367_iir_filt_init(state, ter_state->bw, in stv0367ter_algo()
1678 state->config->xtal)) in stv0367ter_algo()
1683 stv0367ter_agc_iir_rst(state); in stv0367ter_algo()
1687 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x01); in stv0367ter_algo()
1689 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x00); in stv0367ter_algo()
1691 InternalFreq = stv0367ter_get_mclk(state, state->config->xtal) / 1000; in stv0367ter_algo()
1696 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, temp % 2); in stv0367ter_algo()
1698 stv0367_writebits(state, F367TER_TRL_NOMRATE_HI, temp / 256); in stv0367ter_algo()
1699 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, temp % 256); in stv0367ter_algo()
1701 temp = stv0367_readbits(state, F367TER_TRL_NOMRATE_HI) * 512 + in stv0367ter_algo()
1702 stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 + in stv0367ter_algo()
1703 stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB); in stv0367ter_algo()
1705 stv0367_writebits(state, F367TER_GAIN_SRC_HI, temp / 256); in stv0367ter_algo()
1706 stv0367_writebits(state, F367TER_GAIN_SRC_LO, temp % 256); in stv0367ter_algo()
1707 temp = stv0367_readbits(state, F367TER_GAIN_SRC_HI) * 256 + in stv0367ter_algo()
1708 stv0367_readbits(state, F367TER_GAIN_SRC_LO); in stv0367ter_algo()
1711 ((InternalFreq - state->config->if_khz) * (1 << 16) in stv0367ter_algo()
1715 stv0367_writebits(state, F367TER_INC_DEROT_HI, temp / 256); in stv0367ter_algo()
1716 stv0367_writebits(state, F367TER_INC_DEROT_LO, temp % 256); in stv0367ter_algo()
1721 stv0367_writebits(state, F367TER_LONG_ECHO, ter_state->echo_pos); in stv0367ter_algo()
1723 if (stv0367ter_lock_algo(state) != FE_TER_LOCKOK) in stv0367ter_algo()
1726 ter_state->state = FE_TER_LOCKOK; in stv0367ter_algo()
1728 ter_state->mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_algo()
1729 ter_state->guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_algo()
1734 (stv0367_readbits(state, F367TER_AGC1_VAL_LO) << 16) + in stv0367ter_algo()
1735 (stv0367_readbits(state, F367TER_AGC1_VAL_HI) << 24) + in stv0367ter_algo()
1736 stv0367_readbits(state, F367TER_AGC2_VAL_LO) + in stv0367ter_algo()
1737 (stv0367_readbits(state, F367TER_AGC2_VAL_HI) << 8); in stv0367ter_algo()
1740 stv0367_writebits(state, F367TER_FREEZE, 1); in stv0367ter_algo()
1741 offset = (stv0367_readbits(state, F367TER_CRL_FOFFSET_VHI) << 16) ; in stv0367ter_algo()
1742 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_HI) << 8); in stv0367ter_algo()
1743 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_LO)); in stv0367ter_algo()
1744 stv0367_writebits(state, F367TER_FREEZE, 0); in stv0367ter_algo()
1757 if (stv0367_readbits(state, F367TER_PPM_INVSEL) == 1) { in stv0367ter_algo()
1758 if ((stv0367_readbits(state, F367TER_INV_SPECTR) == in stv0367ter_algo()
1759 (stv0367_readbits(state, in stv0367ter_algo()
1775 timing_offset = stv0367_readbits(state, F367TER_TRL_TOFFSET_LO) in stv0367ter_algo()
1776 + 256 * stv0367_readbits(state, in stv0367ter_algo()
1780 trl_nomrate = (512 * stv0367_readbits(state, in stv0367ter_algo()
1782 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 in stv0367ter_algo()
1783 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB)); in stv0367ter_algo()
1800 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, in stv0367ter_algo()
1802 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, in stv0367ter_algo()
1810 u_var = stv0367_readbits(state, F367TER_LK); in stv0367ter_algo()
1813 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_algo()
1815 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_algo()
1824 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_set_frontend() local
1825 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_set_frontend()
1894 ter_state->state = FE_TER_NOLOCK; in stv0367ter_set_frontend()
1897 while (((index) < num_trials) && (ter_state->state != FE_TER_LOCKOK)) { in stv0367ter_set_frontend()
1905 if ((ter_state->state == FE_TER_LOCKOK) && in stv0367ter_set_frontend()
1921 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ucblocks() local
1922 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ucblocks()
1926 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) { in stv0367ter_read_ucblocks()
1928 ((u32)stv0367_readbits(state, F367TER_ERR_CNT1) in stv0367ter_read_ucblocks()
1930 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI) in stv0367ter_read_ucblocks()
1932 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO)); in stv0367ter_read_ucblocks()
1944 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_get_frontend() local
1945 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_get_frontend()
1953 constell = stv0367_readbits(state, F367TER_TPS_CONST); in stv0367ter_get_frontend()
1961 p->inversion = stv0367_readbits(state, F367TER_INV_SPECTR); in stv0367ter_get_frontend()
1964 Data = stv0367_readbits(state, F367TER_TPS_HIERMODE); in stv0367ter_get_frontend()
1986 Data = stv0367_readbits(state, F367TER_TPS_LPCODE); in stv0367ter_get_frontend()
1988 Data = stv0367_readbits(state, F367TER_TPS_HPCODE); in stv0367ter_get_frontend()
2011 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_get_frontend()
2027 p->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_get_frontend()
2034 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_snr() local
2037 u8 cut = stv0367_readbits(state, F367TER_IDENTIFICATIONREG); in stv0367ter_read_snr()
2042 snru32 += stv0367_readbits(state, F367TER_CHCSNR) / 4; in stv0367ter_read_snr()
2044 snru32 += 125 * stv0367_readbits(state, F367TER_CHCSNR); in stv0367ter_read_snr()
2060 struct stv0367_state *state = fe->demodulator_priv;
2061 struct stv0367ter_state *ter_state = state->ter_state;
2064 locked = (stv0367_readbits(state, F367TER_LK));
2071 if (!stv0367_readbits(state, F367TER_TPS_LOCK) ||
2072 (!stv0367_readbits(state, F367TER_LK))) {
2073 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
2075 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
2077 locked = (stv0367_readbits(state, F367TER_TPS_LOCK)) &&
2078 (stv0367_readbits(state, F367TER_LK));
2089 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_status() local
2095 if (stv0367_readbits(state, F367TER_LK)) { in stv0367ter_read_status()
2105 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ber() local
2106 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ber()
2112 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) in stv0367ter_read_ber()
2113 Errors = ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT) in stv0367ter_read_ber()
2115 + ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT_HI) in stv0367ter_read_ber()
2117 + ((u32)stv0367_readbits(state, in stv0367ter_read_ber()
2125 abc = stv0367_readbits(state, F367TER_SFEC_ERR_SOURCE); in stv0367ter_read_ber()
2126 def = stv0367_readbits(state, F367TER_SFEC_NUM_EVENT); in stv0367ter_read_ber()
2187 static u32 stv0367ter_get_per(struct stv0367_state *state)
2189 struct stv0367ter_state *ter_state = state->ter_state;
2193 while (((stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 1) &&
2196 Errors = ((u32)stv0367_readbits(state, F367TER_ERR_CNT1)
2198 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI)
2200 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO));
2203 abc = stv0367_readbits(state, F367TER_ERR_SRC1);
2204 def = stv0367_readbits(state, F367TER_NUM_EVT1);
2268 struct stv0367_state *state = fe->demodulator_priv; in stv0367_release() local
2270 kfree(state->ter_state); in stv0367_release()
2271 kfree(state->cab_state); in stv0367_release()
2272 kfree(state); in stv0367_release()
2309 struct stv0367_state *state = NULL; in stv0367ter_attach() local
2313 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367ter_attach()
2314 if (state == NULL) in stv0367ter_attach()
2321 state->i2c = i2c; in stv0367ter_attach()
2322 state->config = config; in stv0367ter_attach()
2323 state->ter_state = ter_state; in stv0367ter_attach()
2324 state->fe.ops = stv0367ter_ops; in stv0367ter_attach()
2325 state->fe.demodulator_priv = state; in stv0367ter_attach()
2326 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367ter_attach()
2328 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367ter_attach()
2331 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367ter_attach()
2334 return &state->fe; in stv0367ter_attach()
2338 kfree(state); in stv0367ter_attach()
2345 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_gate_ctrl() local
2349 stv0367_writebits(state, F367CAB_I2CT_ON, (enable > 0) ? 1 : 0); in stv0367cab_gate_ctrl()
2356 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_mclk() local
2361 if (stv0367_readbits(state, F367CAB_BYPASS_PLLXN) == 0) { in stv0367cab_get_mclk()
2362 N = (u32)stv0367_readbits(state, F367CAB_PLL_NDIV); in stv0367cab_get_mclk()
2366 M = (u32)stv0367_readbits(state, F367CAB_PLL_MDIV); in stv0367cab_get_mclk()
2370 P = (u32)stv0367_readbits(state, F367CAB_PLL_PDIV); in stv0367cab_get_mclk()
2395 static enum stv0367cab_mod stv0367cab_SetQamSize(struct stv0367_state *state, in stv0367cab_SetQamSize() argument
2400 stv0367_writebits(state, F367CAB_QAM_MODE, QAMSize); in stv0367cab_SetQamSize()
2405 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2408 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x64); in stv0367cab_SetQamSize()
2409 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2410 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
2411 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2412 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2413 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
2414 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
2415 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x8a); in stv0367cab_SetQamSize()
2418 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2419 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x6e); in stv0367cab_SetQamSize()
2420 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
2421 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2422 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xb7); in stv0367cab_SetQamSize()
2423 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x9d); in stv0367cab_SetQamSize()
2424 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
2425 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
2428 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x82); in stv0367cab_SetQamSize()
2429 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
2431 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
2432 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2433 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa5); in stv0367cab_SetQamSize()
2435 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
2436 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2437 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
2439 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
2440 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
2441 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2443 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
2444 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
2445 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x99); in stv0367cab_SetQamSize()
2448 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2449 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x76); in stv0367cab_SetQamSize()
2450 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
2451 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xb1); in stv0367cab_SetQamSize()
2453 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2455 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
2457 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0x97); in stv0367cab_SetQamSize()
2459 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x8e); in stv0367cab_SetQamSize()
2460 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
2461 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
2464 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x94); in stv0367cab_SetQamSize()
2465 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
2466 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
2468 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2470 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2472 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
2474 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2475 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x85); in stv0367cab_SetQamSize()
2476 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
2477 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
2480 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2483 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2492 static u32 stv0367cab_set_derot_freq(struct stv0367_state *state, in stv0367cab_set_derot_freq() argument
2518 stv0367_writereg(state, R367CAB_MIX_NCO_LL, sampled_if); in stv0367cab_set_derot_freq()
2519 stv0367_writereg(state, R367CAB_MIX_NCO_HL, (sampled_if >> 8)); in stv0367cab_set_derot_freq()
2520 stv0367_writebits(state, F367CAB_MIX_NCO_INC_HH, (sampled_if >> 16)); in stv0367cab_set_derot_freq()
2525 static u32 stv0367cab_get_derot_freq(struct stv0367_state *state, u32 adc_hz) in stv0367cab_get_derot_freq() argument
2529 sampled_if = stv0367_readbits(state, F367CAB_MIX_NCO_INC_LL) + in stv0367cab_get_derot_freq()
2530 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HL) << 8) + in stv0367cab_get_derot_freq()
2531 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HH) << 16); in stv0367cab_get_derot_freq()
2541 static u32 stv0367cab_set_srate(struct stv0367_state *state, u32 adc_hz, in stv0367cab_set_srate() argument
2586 stv0367_writereg(state, R367CAB_EQU_CRL_TFR, (u8)u32_tmp); in stv0367cab_set_srate()
2660 if (stv0367_readbits(state, F367CAB_ADJ_EN)) { in stv0367cab_set_srate()
2661 stv0367cab_SetIirAdjacentcoefficient(state, mclk_hz, in stv0367cab_set_srate()
2665 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 1); in stv0367cab_set_srate()
2666 stv0367cab_SetAllPasscoefficient(state, mclk_hz, SymbolRate); in stv0367cab_set_srate()
2671 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_set_srate()
2673 stv0367_writereg(state, R367CAB_SRC_NCO_LL, u32_tmp); in stv0367cab_set_srate()
2674 stv0367_writereg(state, R367CAB_SRC_NCO_LH, (u32_tmp >> 8)); in stv0367cab_set_srate()
2675 stv0367_writereg(state, R367CAB_SRC_NCO_HL, (u32_tmp >> 16)); in stv0367cab_set_srate()
2676 stv0367_writereg(state, R367CAB_SRC_NCO_HH, (u32_tmp >> 24)); in stv0367cab_set_srate()
2678 stv0367_writereg(state, R367CAB_IQDEM_GAIN_SRC_L, u32_tmp1 & 0x00ff); in stv0367cab_set_srate()
2679 stv0367_writebits(state, F367CAB_GAIN_SRC_HI, (u32_tmp1 >> 8) & 0x00ff); in stv0367cab_set_srate()
2684 static u32 stv0367cab_GetSymbolRate(struct stv0367_state *state, u32 mclk_hz) in stv0367cab_GetSymbolRate() argument
2689 regsym = stv0367_readreg(state, R367CAB_SRC_NCO_LL) + in stv0367cab_GetSymbolRate()
2690 (stv0367_readreg(state, R367CAB_SRC_NCO_LH) << 8) + in stv0367cab_GetSymbolRate()
2691 (stv0367_readreg(state, R367CAB_SRC_NCO_HL) << 16) + in stv0367cab_GetSymbolRate()
2692 (stv0367_readreg(state, R367CAB_SRC_NCO_HH) << 24); in stv0367cab_GetSymbolRate()
2732 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_status() local
2738 if (stv0367_readbits(state, F367CAB_QAMFEC_LOCK)) { in stv0367cab_read_status()
2748 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_standby() local
2753 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x03); in stv0367cab_standby()
2754 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x01); in stv0367cab_standby()
2755 stv0367_writebits(state, F367CAB_STDBY, 1); in stv0367cab_standby()
2756 stv0367_writebits(state, F367CAB_STDBY_CORE, 1); in stv0367cab_standby()
2757 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 0); in stv0367cab_standby()
2758 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 0); in stv0367cab_standby()
2759 stv0367_writebits(state, F367CAB_POFFQ, 1); in stv0367cab_standby()
2760 stv0367_writebits(state, F367CAB_POFFI, 1); in stv0367cab_standby()
2762 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x00); in stv0367cab_standby()
2763 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x00); in stv0367cab_standby()
2764 stv0367_writebits(state, F367CAB_STDBY, 0); in stv0367cab_standby()
2765 stv0367_writebits(state, F367CAB_STDBY_CORE, 0); in stv0367cab_standby()
2766 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 1); in stv0367cab_standby()
2767 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 1); in stv0367cab_standby()
2768 stv0367_writebits(state, F367CAB_POFFQ, 0); in stv0367cab_standby()
2769 stv0367_writebits(state, F367CAB_POFFI, 0); in stv0367cab_standby()
2782 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_init() local
2783 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_init()
2789 stv0367_writereg(state, def0367cab[i].addr, in stv0367cab_init()
2792 switch (state->config->ts_mode) { in stv0367cab_init()
2795 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x03); in stv0367cab_init()
2799 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x01); in stv0367cab_init()
2803 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x00); in stv0367cab_init()
2807 switch (state->config->clk_pol) { in stv0367cab_init()
2809 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x00); in stv0367cab_init()
2813 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x01); in stv0367cab_init()
2817 stv0367_writebits(state, F367CAB_SYNC_STRIP, 0x00); in stv0367cab_init()
2819 stv0367_writebits(state, F367CAB_CT_NBST, 0x01); in stv0367cab_init()
2821 stv0367_writebits(state, F367CAB_TS_SWAP, 0x01); in stv0367cab_init()
2823 stv0367_writebits(state, F367CAB_FIFO_BYPASS, 0x00); in stv0367cab_init()
2825 stv0367_writereg(state, R367CAB_ANACTRL, 0x00);/*PLL enabled and used */ in stv0367cab_init()
2827 cab_state->mclk = stv0367cab_get_mclk(fe, state->config->xtal); in stv0367cab_init()
2828 cab_state->adc_clk = stv0367cab_get_adc_freq(fe, state->config->xtal); in stv0367cab_init()
2833 enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state, in stv0367cab_algo() argument
2836 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_algo()
2912 stv0367_writereg(state, R367CAB_CTRL_1, 0x04); in stv0367cab_algo()
2915 TrackAGCAccum = stv0367_readbits(state, F367CAB_AGC_ACCUMRSTSEL); in stv0367cab_algo()
2916 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, 0x0); in stv0367cab_algo()
2918 stv0367_writebits(state, F367CAB_MODULUSMAP_EN, 0); in stv0367cab_algo()
2920 stv0367_writebits(state, F367CAB_SWEEP_EN, 0); in stv0367cab_algo()
2923 stv0367cab_set_derot_freq(state, cab_state->adc_clk, in stv0367cab_algo()
2924 (1000 * (s32)state->config->if_khz + cab_state->derot_offset)); in stv0367cab_algo()
2927 stv0367_writebits(state, F367CAB_ADJ_EN, 0); in stv0367cab_algo()
2928 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_algo()
2939 stv0367_writereg(state, R367CAB_CTRL_1, 0x00); in stv0367cab_algo()
2941 QAM_Lock = stv0367_readbits(state, F367CAB_FSM_STATUS); in stv0367cab_algo()
2958 u32_tmp = stv0367_readbits(state, in stv0367cab_algo()
2960 (stv0367_readbits(state, in stv0367cab_algo()
2962 (stv0367_readbits(state, in stv0367cab_algo()
2966 u32_tmp = u32_tmp / (1 << (11 - stv0367_readbits(state, in stv0367cab_algo()
2969 if (u32_tmp < stv0367_readbits(state, in stv0367cab_algo()
2971 256 * stv0367_readbits(state, in stv0367cab_algo()
2979 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2988 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2990 tmp = stv0367_readreg(state, R367CAB_IT_STATUS2); in stv0367cab_algo()
2993 tmp = stv0367cab_get_derot_freq(state, cab_state->adc_clk); in stv0367cab_algo()
3002 QAMFEC_Lock = stv0367_readbits(state, in stv0367cab_algo()
3010 cab_state->spect_inv = stv0367_readbits(state, in stv0367cab_algo()
3014 if (state->config->if_khz != 0) { in stv0367cab_algo()
3015 if (state->config->if_khz > cab_state->adc_clk / 1000) { in stv0367cab_algo()
3018 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
3019 - cab_state->adc_clk / 1000 + state->config->if_khz; in stv0367cab_algo()
3023 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
3024 + state->config->if_khz; in stv0367cab_algo()
3029 stv0367cab_get_derot_freq(state, in stv0367cab_algo()
3034 cab_state->symbol_rate = stv0367cab_GetSymbolRate(state, in stv0367cab_algo()
3087 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, TrackAGCAccum); in stv0367cab_algo()
3094 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_set_frontend() local
3095 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_set_frontend()
3135 state, in stv0367cab_set_frontend()
3139 stv0367cab_set_srate(state, in stv0367cab_set_frontend()
3145 cab_state->state = stv0367cab_algo(state, p); in stv0367cab_set_frontend()
3152 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_frontend() local
3153 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_get_frontend()
3159 p->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk); in stv0367cab_get_frontend()
3161 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_get_frontend()
3186 if (state->config->if_khz == 0) { in stv0367cab_get_frontend()
3188 (stv0367cab_get_derot_freq(state, cab_state->adc_clk) - in stv0367cab_get_frontend()
3193 if (state->config->if_khz > cab_state->adc_clk / 1000) in stv0367cab_get_frontend()
3194 p->frequency += (state->config->if_khz in stv0367cab_get_frontend()
3195 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_get_frontend()
3198 p->frequency += (state->config->if_khz in stv0367cab_get_frontend()
3199 - stv0367cab_get_derot_freq(state, cab_state->adc_clk)); in stv0367cab_get_frontend()
3205 void stv0367cab_GetErrorCount(state, enum stv0367cab_mod QAMSize,
3208 stv0367cab_OptimiseNByteAndGetBER(state, QAMSize, symbol_rate, Monitor_results);
3209 stv0367cab_GetPacketsCount(state, Monitor_results);
3216 struct stv0367_state *state = fe->demodulator_priv;
3221 static s32 stv0367cab_get_rf_lvl(struct stv0367_state *state) in stv0367cab_get_rf_lvl() argument
3227 stv0367_writebits(state, F367CAB_STDBY_ADCGP, 0x0); in stv0367cab_get_rf_lvl()
3230 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_LO) & 0x03) + in stv0367cab_get_rf_lvl()
3231 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_HI) << 2); in stv0367cab_get_rf_lvl()
3235 stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_LO) + in stv0367cab_get_rf_lvl()
3236 (stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_HI) << 8); in stv0367cab_get_rf_lvl()
3269 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_strength() local
3271 s32 signal = stv0367cab_get_rf_lvl(state); in stv0367cab_read_strength()
3287 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_snr() local
3293 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_read_snr()
3325 regval += (stv0367_readbits(state, F367CAB_SNR_LO) in stv0367cab_read_snr()
3326 + 256 * stv0367_readbits(state, F367CAB_SNR_HI)); in stv0367cab_read_snr()
3332 * (1 << (3 + stv0367_readbits(state, F367CAB_SNR_PER))); in stv0367cab_read_snr()
3377 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_ucblcks() local
3380 *ucblocks = (stv0367_readreg(state, R367CAB_RS_COUNTER_5) << 8) in stv0367cab_read_ucblcks()
3381 | stv0367_readreg(state, R367CAB_RS_COUNTER_4); in stv0367cab_read_ucblcks()
3382 corrected = (stv0367_readreg(state, R367CAB_RS_COUNTER_3) << 8) in stv0367cab_read_ucblcks()
3383 | stv0367_readreg(state, R367CAB_RS_COUNTER_2); in stv0367cab_read_ucblcks()
3384 tscount = (stv0367_readreg(state, R367CAB_RS_COUNTER_2) << 8) in stv0367cab_read_ucblcks()
3385 | stv0367_readreg(state, R367CAB_RS_COUNTER_1); in stv0367cab_read_ucblcks()
3424 struct stv0367_state *state = NULL; in stv0367cab_attach() local
3428 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367cab_attach()
3429 if (state == NULL) in stv0367cab_attach()
3436 state->i2c = i2c; in stv0367cab_attach()
3437 state->config = config; in stv0367cab_attach()
3439 state->cab_state = cab_state; in stv0367cab_attach()
3440 state->fe.ops = stv0367cab_ops; in stv0367cab_attach()
3441 state->fe.demodulator_priv = state; in stv0367cab_attach()
3442 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367cab_attach()
3444 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367cab_attach()
3447 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367cab_attach()
3450 return &state->fe; in stv0367cab_attach()
3454 kfree(state); in stv0367cab_attach()