63 static int m88rs2000_writereg(struct m88rs2000_state *state,  in m88rs2000_writereg()  function
148 	ret = m88rs2000_writereg(state, 0x9c, (u8)(tmp >> 4));  in m88rs2000_set_carrieroffset()
154 	ret |= m88rs2000_writereg(state, 0x9d, reg);  in m88rs2000_set_carrieroffset()
183 	ret = m88rs2000_writereg(state, 0x93, b[2]);  in m88rs2000_set_symbolrate()
184 	ret |= m88rs2000_writereg(state, 0x94, b[1]);  in m88rs2000_set_symbolrate()
185 	ret |= m88rs2000_writereg(state, 0x95, b[0]);  in m88rs2000_set_symbolrate()
188 		ret |= m88rs2000_writereg(state, 0xa0, 0x20);  in m88rs2000_set_symbolrate()
190 		ret |= m88rs2000_writereg(state, 0xa0, 0x60);  in m88rs2000_set_symbolrate()
192 	ret |= m88rs2000_writereg(state, 0xa1, 0xe0);  in m88rs2000_set_symbolrate()
195 		ret |= m88rs2000_writereg(state, 0xa3, 0x20);  in m88rs2000_set_symbolrate()
197 		ret |= m88rs2000_writereg(state, 0xa3, 0x98);  in m88rs2000_set_symbolrate()
199 		ret |= m88rs2000_writereg(state, 0xa3, 0x90);  in m88rs2000_set_symbolrate()
213 	m88rs2000_writereg(state, 0x9a, 0x30);  in m88rs2000_send_diseqc_msg()
216 	m88rs2000_writereg(state, 0xb2, reg);  in m88rs2000_send_diseqc_msg()
218 		m88rs2000_writereg(state, 0xb3 + i, m->msg[i]);  in m88rs2000_send_diseqc_msg()
224 	m88rs2000_writereg(state, 0xb1, reg);  in m88rs2000_send_diseqc_msg()
236 		m88rs2000_writereg(state, 0xb1, reg);  in m88rs2000_send_diseqc_msg()
242 	m88rs2000_writereg(state, 0xb2, reg);  in m88rs2000_send_diseqc_msg()
243 	m88rs2000_writereg(state, 0x9a, 0xb0);  in m88rs2000_send_diseqc_msg()
255 	m88rs2000_writereg(state, 0x9a, 0x30);  in m88rs2000_send_diseqc_burst()
260 	m88rs2000_writereg(state, 0xb2, reg1);  in m88rs2000_send_diseqc_burst()
261 	m88rs2000_writereg(state, 0xb1, reg0);  in m88rs2000_send_diseqc_burst()
262 	m88rs2000_writereg(state, 0x9a, 0xb0);  in m88rs2000_send_diseqc_burst()
272 	m88rs2000_writereg(state, 0x9a, 0x30);  in m88rs2000_set_tone()
289 	m88rs2000_writereg(state, 0xb2, reg1);  in m88rs2000_set_tone()
290 	m88rs2000_writereg(state, 0xb1, reg0);  in m88rs2000_set_tone()
291 	m88rs2000_writereg(state, 0x9a, 0xb0);  in m88rs2000_set_tone()
395 			ret = m88rs2000_writereg(state, tab[i].reg,  in m88rs2000_tab_set()
437 	m88rs2000_writereg(state, 0xb2, data);  in m88rs2000_set_voltage()
489 	m88rs2000_writereg(state, 0x9a, 0x30);  in m88rs2000_read_ber()
492 		m88rs2000_writereg(state, 0x9a, 0xb0);  in m88rs2000_read_ber()
501 	m88rs2000_writereg(state, 0xd9, (tmp1 & ~7) | 4);  in m88rs2000_read_ber()
503 	m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30);  in m88rs2000_read_ber()
504 	m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30);  in m88rs2000_read_ber()
505 	m88rs2000_writereg(state, 0x9a, 0xb0);  in m88rs2000_read_ber()
536 	m88rs2000_writereg(state, 0xd8, tmp & ~0x20);  in m88rs2000_read_ucblocks()
538 	m88rs2000_writereg(state, 0xd8, tmp | 0x20);  in m88rs2000_read_ucblocks()
539 	m88rs2000_writereg(state, 0xd8, tmp | 0x20);  in m88rs2000_read_ucblocks()
573 	ret = m88rs2000_writereg(state, 0x70, reg | fec_set);  in m88rs2000_set_fec()
575 	ret |= m88rs2000_writereg(state, 0x76, 0x8);  in m88rs2000_set_fec()
583 	m88rs2000_writereg(state, 0x9a, 0x30);  in m88rs2000_get_fec()
585 	m88rs2000_writereg(state, 0x9a, 0xb0);  in m88rs2000_get_fec()
645 		ret = m88rs2000_writereg(state, 0x86, 0xc2);  in m88rs2000_set_frontend()
647 		ret = m88rs2000_writereg(state, 0x86, 0xc6);  in m88rs2000_set_frontend()
655 		ret = m88rs2000_writereg(state, 0xf1, 0xa4);  in m88rs2000_set_frontend()
657 		ret = m88rs2000_writereg(state, 0xf1, 0xbf);  in m88rs2000_set_frontend()
665 	ret |= m88rs2000_writereg(state, 0x85, 0x1);  in m88rs2000_set_frontend()
666 	ret |= m88rs2000_writereg(state, 0x8a, 0xbf);  in m88rs2000_set_frontend()
667 	ret |= m88rs2000_writereg(state, 0x8d, 0x1e);  in m88rs2000_set_frontend()
668 	ret |= m88rs2000_writereg(state, 0x90, 0xf1);  in m88rs2000_set_frontend()
669 	ret |= m88rs2000_writereg(state, 0x91, 0x08);  in m88rs2000_set_frontend()
694 			m88rs2000_writereg(state, 0x70, reg);  in m88rs2000_set_frontend()
742 		m88rs2000_writereg(state, 0x81, 0x84);  in m88rs2000_i2c_gate_ctrl()
744 		m88rs2000_writereg(state, 0x81, 0x81);  in m88rs2000_i2c_gate_ctrl()