Lines Matching refs:write16
403 static int write16(struct drxk_state *state, u32 reg, u16 data) in write16() function
523 status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); in power_up_device()
526 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_up_device()
530 status = write16(state, SIO_CC_PLL_LOCK__A, 1); in power_up_device()
788 status = write16(state, SCU_RAM_GPIO__A, in drxx_open()
796 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in drxx_open()
805 status = write16(state, SIO_TOP_COMM_KEY__A, key); in drxx_open()
823 status = write16(state, SCU_RAM_GPIO__A, in get_device_capabilities()
827 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in get_device_capabilities()
833 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in get_device_capabilities()
1020 status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd); in hi_command()
1062 status = write16(state, SIO_HI_RA_RAM_PAR_6__A, in hi_cfg_command()
1066 status = write16(state, SIO_HI_RA_RAM_PAR_5__A, in hi_cfg_command()
1070 status = write16(state, SIO_HI_RA_RAM_PAR_4__A, in hi_cfg_command()
1074 status = write16(state, SIO_HI_RA_RAM_PAR_3__A, in hi_cfg_command()
1078 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in hi_cfg_command()
1082 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in hi_cfg_command()
1122 status = write16(state, SCU_RAM_GPIO__A, in mpegts_configure_pins()
1128 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in mpegts_configure_pins()
1134 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); in mpegts_configure_pins()
1137 status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); in mpegts_configure_pins()
1140 status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); in mpegts_configure_pins()
1143 status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); in mpegts_configure_pins()
1146 status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000); in mpegts_configure_pins()
1149 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1152 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1155 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1158 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1161 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1164 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1167 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1179 status = write16(state, SIO_PDR_MSTRT_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1186 status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg); in mpegts_configure_pins()
1189 status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg); in mpegts_configure_pins()
1195 status = write16(state, SIO_PDR_MD1_CFG__A, in mpegts_configure_pins()
1199 status = write16(state, SIO_PDR_MD2_CFG__A, in mpegts_configure_pins()
1203 status = write16(state, SIO_PDR_MD3_CFG__A, in mpegts_configure_pins()
1207 status = write16(state, SIO_PDR_MD4_CFG__A, in mpegts_configure_pins()
1211 status = write16(state, SIO_PDR_MD5_CFG__A, in mpegts_configure_pins()
1215 status = write16(state, SIO_PDR_MD6_CFG__A, in mpegts_configure_pins()
1219 status = write16(state, SIO_PDR_MD7_CFG__A, in mpegts_configure_pins()
1228 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1231 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1234 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1237 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1240 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1243 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1246 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1250 status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg); in mpegts_configure_pins()
1253 status = write16(state, SIO_PDR_MD0_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1258 status = write16(state, SIO_PDR_MON_CFG__A, 0x0000); in mpegts_configure_pins()
1262 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in mpegts_configure_pins()
1285 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN); in bl_chain_cmd()
1288 status = write16(state, SIO_BL_CHAIN_ADDR__A, rom_offset); in bl_chain_cmd()
1291 status = write16(state, SIO_BL_CHAIN_LEN__A, nr_of_elements); in bl_chain_cmd()
1294 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_chain_cmd()
1406 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl); in dvbt_enable_ofdm_token_ring()
1436 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_stop()
1445 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode); in mpegts_stop()
1578 status = write16(state, IQM_AF_STDBY__A, data); in set_iqm_af()
1668 status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); in ctrl_power_mode()
1671 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in ctrl_power_mode()
1722 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in power_down_dvbt()
1725 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in power_down_dvbt()
1728 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in power_down_dvbt()
1762 status = write16(state, SCU_RAM_GPIO__A, in setoperation_mode()
1930 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_start()
1933 status = write16(state, FEC_OC_SNC_UNLOCK__A, 1); in mpegts_start()
1947 status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000); in mpegts_dto_init()
1950 status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C); in mpegts_dto_init()
1953 status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A); in mpegts_dto_init()
1956 status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008); in mpegts_dto_init()
1959 status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006); in mpegts_dto_init()
1962 status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680); in mpegts_dto_init()
1965 status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080); in mpegts_dto_init()
1968 status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4); in mpegts_dto_init()
1973 status = write16(state, FEC_OC_OCR_INVERT__A, 0); in mpegts_dto_init()
1976 status = write16(state, FEC_OC_SNC_LWM__A, 2); in mpegts_dto_init()
1979 status = write16(state, FEC_OC_SNC_HWM__A, 12); in mpegts_dto_init()
2090 status = write16(state, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len); in mpegts_dto_setup()
2093 status = write16(state, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period); in mpegts_dto_setup()
2096 status = write16(state, FEC_OC_DTO_MODE__A, fec_oc_dto_mode); in mpegts_dto_setup()
2099 status = write16(state, FEC_OC_FCT_MODE__A, fec_oc_fct_mode); in mpegts_dto_setup()
2102 status = write16(state, FEC_OC_MODE__A, fec_oc_reg_mode); in mpegts_dto_setup()
2105 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode); in mpegts_dto_setup()
2113 status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A, in mpegts_dto_setup()
2117 status = write16(state, FEC_OC_TMD_MODE__A, fec_oc_tmd_mode); in mpegts_dto_setup()
2154 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert); in mpegts_configure_polarity()
2178 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2193 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2207 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_rf()
2224 status = write16(state, in set_agc_rf()
2232 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, in set_agc_rf()
2238 status = write16(state, SCU_RAM_AGC_RF_MAX__A, in set_agc_rf()
2251 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2264 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2269 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); in set_agc_rf()
2274 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, in set_agc_rf()
2286 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2295 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2329 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2345 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2358 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_if()
2369 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2382 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2398 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2403 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2416 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2425 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2433 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top); in set_agc_if()
2769 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in ConfigureI2CBridge()
2774 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2779 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2804 status = write16(state, IQM_AF_PDREF__A, p_pre_saw_cfg->reference); in set_pre_saw()
2823 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT); in bl_direct_cmd()
2826 status = write16(state, SIO_BL_TGT_HDR__A, blockbank); in bl_direct_cmd()
2829 status = write16(state, SIO_BL_TGT_ADDR__A, offset); in bl_direct_cmd()
2832 status = write16(state, SIO_BL_SRC_ADDR__A, rom_offset); in bl_direct_cmd()
2835 status = write16(state, SIO_BL_SRC_LEN__A, nr_of_elements); in bl_direct_cmd()
2838 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_direct_cmd()
2870 status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE); in adc_sync_measurement()
2873 status = write16(state, IQM_AF_START_LOCK__A, 1); in adc_sync_measurement()
2928 status = write16(state, IQM_AF_CLKNEG__A, clk_neg); in adc_synchronization()
3062 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in init_agc()
3067 status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode); in init_agc()
3070 status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt); in init_agc()
3073 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min); in init_agc()
3076 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max); in init_agc()
3079 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, in init_agc()
3083 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in init_agc()
3087 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); in init_agc()
3090 status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); in init_agc()
3093 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); in init_agc()
3096 status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); in init_agc()
3099 status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max); in init_agc()
3102 status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max); in init_agc()
3106 status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, in init_agc()
3110 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A, in init_agc()
3114 status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen); in init_agc()
3118 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); in init_agc()
3121 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); in init_agc()
3124 status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); in init_agc()
3128 status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); in init_agc()
3131 status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min); in init_agc()
3134 status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min); in init_agc()
3137 status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to); in init_agc()
3140 status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to); in init_agc()
3143 status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); in init_agc()
3146 status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); in init_agc()
3149 status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); in init_agc()
3152 status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); in init_agc()
3155 status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); in init_agc()
3158 status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); in init_agc()
3161 status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); in init_agc()
3164 status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); in init_agc()
3167 status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); in init_agc()
3170 status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); in init_agc()
3173 status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); in init_agc()
3176 status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); in init_agc()
3179 status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); in init_agc()
3182 status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); in init_agc()
3197 status = write16(state, SCU_RAM_AGC_KI__A, data); in init_agc()
3210 status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in dvbtqam_get_acc_pkt_err()
3255 status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); in dvbt_sc_command()
3274 status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); in dvbt_sc_command()
3278 status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0); in dvbt_sc_command()
3283 status |= write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); in dvbt_sc_command()
3358 status = write16(state, IQM_CF_BYPASSDET__A, 0); in dvbt_ctrl_set_inc_enable()
3360 status = write16(state, IQM_CF_BYPASSDET__A, 1); in dvbt_ctrl_set_inc_enable()
3375 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, in dvbt_ctrl_set_fr_enable()
3379 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0); in dvbt_ctrl_set_fr_enable()
3415 status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data); in dvbt_ctrl_set_echo_threshold()
3437 status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A, in dvbt_ctrl_set_sqi_speed()
3477 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, in dvbt_activate_presets()
3523 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt_standard()
3526 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt_standard()
3529 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_dvbt_standard()
3535 status = write16(state, IQM_AF_UPD_SEL__A, 1); in set_dvbt_standard()
3539 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_dvbt_standard()
3543 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_dvbt_standard()
3547 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_dvbt_standard()
3554 status = write16(state, IQM_AF_AGC_RF__A, 0); in set_dvbt_standard()
3559 status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ in set_dvbt_standard()
3562 status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ in set_dvbt_standard()
3565 status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ in set_dvbt_standard()
3569 status = write16(state, IQM_RC_STRETCH__A, 16); in set_dvbt_standard()
3572 status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ in set_dvbt_standard()
3575 status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ in set_dvbt_standard()
3578 status = write16(state, IQM_CF_SCALE__A, 1600); in set_dvbt_standard()
3581 status = write16(state, IQM_CF_SCALE_SH__A, 0); in set_dvbt_standard()
3586 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_dvbt_standard()
3589 status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ in set_dvbt_standard()
3598 status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ in set_dvbt_standard()
3601 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); in set_dvbt_standard()
3605 status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); in set_dvbt_standard()
3608 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_dvbt_standard()
3621 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt_standard()
3637 status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); in set_dvbt_standard()
3642 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt_standard()
3648 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in set_dvbt_standard()
3656 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); in set_dvbt_standard()
3659 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); in set_dvbt_standard()
3665 status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ in set_dvbt_standard()
3671 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); in set_dvbt_standard()
3675 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); in set_dvbt_standard()
3679 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); in set_dvbt_standard()
3723 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in dvbt_start()
3762 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt()
3767 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt()
3770 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt()
3776 status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); in set_dvbt()
3875 status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); in set_dvbt()
3922 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3927 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3931 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3935 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3939 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3946 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3951 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3955 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3959 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3963 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3970 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3975 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3979 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3983 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3987 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
4043 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt()
4048 status = write16(state, OFDM_SC_COMM_STATE__A, 0); in set_dvbt()
4051 status = write16(state, OFDM_SC_COMM_EXEC__A, 1); in set_dvbt()
4164 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in power_down_qam()
4257 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fec_rs_period); in set_qam_measurement()
4260 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, in set_qam_measurement()
4264 status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fec_rs_period); in set_qam_measurement()
4278 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517); in set_qam16()
4281 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517); in set_qam16()
4284 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517); in set_qam16()
4287 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517); in set_qam16()
4290 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517); in set_qam16()
4293 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517); in set_qam16()
4297 status = write16(state, QAM_DQ_QUAL_FUN0__A, 2); in set_qam16()
4300 status = write16(state, QAM_DQ_QUAL_FUN1__A, 2); in set_qam16()
4303 status = write16(state, QAM_DQ_QUAL_FUN2__A, 2); in set_qam16()
4306 status = write16(state, QAM_DQ_QUAL_FUN3__A, 2); in set_qam16()
4309 status = write16(state, QAM_DQ_QUAL_FUN4__A, 2); in set_qam16()
4312 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam16()
4316 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam16()
4319 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam16()
4322 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam16()
4327 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam16()
4333 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam16()
4336 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam16()
4339 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam16()
4342 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam16()
4345 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam16()
4348 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam16()
4351 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam16()
4354 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam16()
4358 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam16()
4361 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam16()
4364 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam16()
4367 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam16()
4370 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam16()
4373 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam16()
4376 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam16()
4379 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam16()
4382 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32); in set_qam16()
4385 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam16()
4388 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam16()
4391 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam16()
4398 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140); in set_qam16()
4401 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam16()
4404 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95); in set_qam16()
4407 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120); in set_qam16()
4410 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230); in set_qam16()
4413 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105); in set_qam16()
4417 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam16()
4420 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam16()
4423 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24); in set_qam16()
4430 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16); in set_qam16()
4433 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220); in set_qam16()
4436 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25); in set_qam16()
4439 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6); in set_qam16()
4442 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24); in set_qam16()
4445 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65); in set_qam16()
4448 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127); in set_qam16()
4473 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707); in set_qam32()
4476 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707); in set_qam32()
4479 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707); in set_qam32()
4482 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707); in set_qam32()
4485 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707); in set_qam32()
4488 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707); in set_qam32()
4493 status = write16(state, QAM_DQ_QUAL_FUN0__A, 3); in set_qam32()
4496 status = write16(state, QAM_DQ_QUAL_FUN1__A, 3); in set_qam32()
4499 status = write16(state, QAM_DQ_QUAL_FUN2__A, 3); in set_qam32()
4502 status = write16(state, QAM_DQ_QUAL_FUN3__A, 3); in set_qam32()
4505 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam32()
4508 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam32()
4512 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam32()
4515 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam32()
4518 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam32()
4524 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam32()
4532 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam32()
4535 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam32()
4538 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam32()
4541 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam32()
4544 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam32()
4547 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam32()
4550 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam32()
4553 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam32()
4557 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam32()
4560 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam32()
4563 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam32()
4566 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam32()
4569 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam32()
4572 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam32()
4575 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam32()
4578 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam32()
4581 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16); in set_qam32()
4584 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam32()
4587 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam32()
4590 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam32()
4597 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90); in set_qam32()
4600 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam32()
4603 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam32()
4606 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam32()
4609 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170); in set_qam32()
4612 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam32()
4616 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam32()
4619 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam32()
4622 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10); in set_qam32()
4629 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam32()
4632 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140); in set_qam32()
4635 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8); in set_qam32()
4638 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16); in set_qam32()
4641 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26); in set_qam32()
4644 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56); in set_qam32()
4647 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86); in set_qam32()
4668 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336); in set_qam64()
4671 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618); in set_qam64()
4674 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988); in set_qam64()
4677 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809); in set_qam64()
4680 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809); in set_qam64()
4683 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609); in set_qam64()
4688 status = write16(state, QAM_DQ_QUAL_FUN0__A, 4); in set_qam64()
4691 status = write16(state, QAM_DQ_QUAL_FUN1__A, 4); in set_qam64()
4694 status = write16(state, QAM_DQ_QUAL_FUN2__A, 4); in set_qam64()
4697 status = write16(state, QAM_DQ_QUAL_FUN3__A, 4); in set_qam64()
4700 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam64()
4703 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam64()
4707 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam64()
4710 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam64()
4713 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam64()
4718 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam64()
4726 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam64()
4729 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam64()
4732 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam64()
4735 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam64()
4738 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam64()
4741 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam64()
4744 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam64()
4747 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam64()
4751 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam64()
4754 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30); in set_qam64()
4757 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100); in set_qam64()
4760 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam64()
4763 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30); in set_qam64()
4766 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam64()
4769 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam64()
4772 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam64()
4775 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam64()
4778 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam64()
4781 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam64()
4784 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam64()
4791 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100); in set_qam64()
4794 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam64()
4797 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam64()
4800 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110); in set_qam64()
4803 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200); in set_qam64()
4806 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95); in set_qam64()
4810 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam64()
4813 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam64()
4816 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15); in set_qam64()
4823 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam64()
4826 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141); in set_qam64()
4829 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7); in set_qam64()
4832 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0); in set_qam64()
4835 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15); in set_qam64()
4838 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45); in set_qam64()
4841 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80); in set_qam64()
4863 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564); in set_qam128()
4866 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598); in set_qam128()
4869 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394); in set_qam128()
4872 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409); in set_qam128()
4875 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656); in set_qam128()
4878 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238); in set_qam128()
4883 status = write16(state, QAM_DQ_QUAL_FUN0__A, 6); in set_qam128()
4886 status = write16(state, QAM_DQ_QUAL_FUN1__A, 6); in set_qam128()
4889 status = write16(state, QAM_DQ_QUAL_FUN2__A, 6); in set_qam128()
4892 status = write16(state, QAM_DQ_QUAL_FUN3__A, 6); in set_qam128()
4895 status = write16(state, QAM_DQ_QUAL_FUN4__A, 5); in set_qam128()
4898 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam128()
4902 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam128()
4905 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam128()
4908 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam128()
4915 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam128()
4923 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam128()
4926 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam128()
4929 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam128()
4932 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam128()
4935 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam128()
4938 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam128()
4941 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam128()
4944 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam128()
4948 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam128()
4951 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40); in set_qam128()
4954 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120); in set_qam128()
4957 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam128()
4960 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40); in set_qam128()
4963 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60); in set_qam128()
4966 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam128()
4969 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam128()
4972 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64); in set_qam128()
4975 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam128()
4978 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam128()
4981 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam128()
4988 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam128()
4991 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam128()
4994 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam128()
4997 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam128()
5000 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140); in set_qam128()
5003 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam128()
5007 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam128()
5010 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5); in set_qam128()
5014 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam128()
5020 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam128()
5023 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65); in set_qam128()
5026 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5); in set_qam128()
5029 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3); in set_qam128()
5032 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1); in set_qam128()
5035 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12); in set_qam128()
5038 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23); in set_qam128()
5060 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); in set_qam256()
5063 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); in set_qam256()
5066 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); in set_qam256()
5069 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); in set_qam256()
5072 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); in set_qam256()
5075 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); in set_qam256()
5080 status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); in set_qam256()
5083 status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); in set_qam256()
5086 status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); in set_qam256()
5089 status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); in set_qam256()
5092 status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); in set_qam256()
5095 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam256()
5099 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam256()
5102 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam256()
5105 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam256()
5111 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam256()
5119 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam256()
5122 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam256()
5125 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam256()
5128 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam256()
5131 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam256()
5134 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam256()
5137 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam256()
5140 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam256()
5144 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam256()
5147 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50); in set_qam256()
5150 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250); in set_qam256()
5153 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam256()
5156 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50); in set_qam256()
5159 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125); in set_qam256()
5162 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam256()
5165 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam256()
5168 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam256()
5171 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam256()
5174 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam256()
5177 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam256()
5184 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam256()
5187 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam256()
5190 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam256()
5193 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam256()
5196 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); in set_qam256()
5199 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110); in set_qam256()
5203 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam256()
5206 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam256()
5209 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam256()
5216 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam256()
5219 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74); in set_qam256()
5222 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); in set_qam256()
5225 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13); in set_qam256()
5228 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7); in set_qam256()
5231 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0); in set_qam256()
5234 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8); in set_qam256()
5256 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in qam_reset_qam()
5297 status = write16(state, IQM_FD_RATESEL__A, ratesel); in qam_set_symbolrate()
5331 status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lc_symb_rate); in qam_set_symbolrate()
5461 status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); in set_qam()
5464 status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP); in set_qam()
5562 status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); in set_qam()
5565 status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); in set_qam()
5570 status = write16(state, QAM_LC_RATE_LIMIT__A, 3); in set_qam()
5573 status = write16(state, QAM_LC_LPF_FACTORP__A, 4); in set_qam()
5576 status = write16(state, QAM_LC_LPF_FACTORI__A, 4); in set_qam()
5579 status = write16(state, QAM_LC_MODE__A, 7); in set_qam()
5583 status = write16(state, QAM_LC_QUAL_TAB0__A, 1); in set_qam()
5586 status = write16(state, QAM_LC_QUAL_TAB1__A, 1); in set_qam()
5589 status = write16(state, QAM_LC_QUAL_TAB2__A, 1); in set_qam()
5592 status = write16(state, QAM_LC_QUAL_TAB3__A, 1); in set_qam()
5595 status = write16(state, QAM_LC_QUAL_TAB4__A, 2); in set_qam()
5598 status = write16(state, QAM_LC_QUAL_TAB5__A, 2); in set_qam()
5601 status = write16(state, QAM_LC_QUAL_TAB6__A, 2); in set_qam()
5604 status = write16(state, QAM_LC_QUAL_TAB8__A, 2); in set_qam()
5607 status = write16(state, QAM_LC_QUAL_TAB9__A, 2); in set_qam()
5610 status = write16(state, QAM_LC_QUAL_TAB10__A, 2); in set_qam()
5613 status = write16(state, QAM_LC_QUAL_TAB12__A, 2); in set_qam()
5616 status = write16(state, QAM_LC_QUAL_TAB15__A, 3); in set_qam()
5619 status = write16(state, QAM_LC_QUAL_TAB16__A, 3); in set_qam()
5622 status = write16(state, QAM_LC_QUAL_TAB20__A, 4); in set_qam()
5625 status = write16(state, QAM_LC_QUAL_TAB25__A, 4); in set_qam()
5630 status = write16(state, QAM_SY_SP_INV__A, in set_qam()
5636 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam()
5666 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam()
5681 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in set_qam()
5684 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE); in set_qam()
5687 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_qam()
5733 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_qam_standard()
5736 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_qam_standard()
5767 status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B); in set_qam_standard()
5770 status = write16(state, IQM_CF_SYMMETRIC__A, 0); in set_qam_standard()
5773 status = write16(state, IQM_CF_MIDTAP__A, in set_qam_standard()
5778 status = write16(state, IQM_RC_STRETCH__A, 21); in set_qam_standard()
5781 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_qam_standard()
5784 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_qam_standard()
5787 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_qam_standard()
5790 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0); in set_qam_standard()
5794 status = write16(state, IQM_FS_ADJ_SEL__A, 1); in set_qam_standard()
5797 status = write16(state, IQM_RC_ADJ_SEL__A, 1); in set_qam_standard()
5800 status = write16(state, IQM_CF_ADJ_SEL__A, 1); in set_qam_standard()
5803 status = write16(state, IQM_AF_UPD_SEL__A, 0); in set_qam_standard()
5808 status = write16(state, IQM_CF_CLP_VAL__A, 500); in set_qam_standard()
5811 status = write16(state, IQM_CF_DATATH__A, 1000); in set_qam_standard()
5814 status = write16(state, IQM_CF_BYPASSDET__A, 1); in set_qam_standard()
5817 status = write16(state, IQM_CF_DET_LCT__A, 0); in set_qam_standard()
5820 status = write16(state, IQM_CF_WND_LEN__A, 1); in set_qam_standard()
5823 status = write16(state, IQM_CF_PKDTH__A, 1); in set_qam_standard()
5826 status = write16(state, IQM_AF_INC_BYPASS__A, 1); in set_qam_standard()
5834 status = write16(state, IQM_AF_START_LOCK__A, 0x01); in set_qam_standard()
5844 status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); in set_qam_standard()
5849 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam_standard()
5872 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam_standard()
5886 status = write16(state, SCU_RAM_GPIO__A, in write_gpio()
5892 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in write_gpio()
5899 status = write16(state, SIO_PDR_SMA_TX_CFG__A, in write_gpio()
5913 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5919 status = write16(state, SIO_PDR_SMA_RX_CFG__A, in write_gpio()
5933 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5939 status = write16(state, SIO_PDR_GPIO_CFG__A, in write_gpio()
5953 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5959 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in write_gpio()
6039 status = write16(state, SIO_CC_PWD_MODE__A, in power_down_device()
6043 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_down_device()
6071 status = write16(state, SIO_CC_SOFT_RST__A, in init_drxk()
6077 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in init_drxk()
6116 status = write16(state, SCU_RAM_GPIO__A, in init_drxk()
6128 status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); in init_drxk()
6131 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); in init_drxk()
6136 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6142 status = write16(state, SIO_BL_COMM_EXEC__A, in init_drxk()
6158 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6164 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in init_drxk()
6189 status = write16(state, SCU_RAM_DRIVER_VER_HI__A, in init_drxk()
6198 status = write16(state, SCU_RAM_DRIVER_VER_LO__A, in init_drxk()
6218 status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); in init_drxk()
6224 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP); in init_drxk()
6616 write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in drxk_get_stats()