143 	u8 r;  in cx24113_set_parameters()  local
145 	r = cx24113_readreg(state, 0x10) & 0x82;  in cx24113_set_parameters()
146 	r |= state->icp_mode;  in cx24113_set_parameters()
147 	r |= state->icp_man << 4;  in cx24113_set_parameters()
148 	r |= state->icp_dig << 2;  in cx24113_set_parameters()
149 	r |= state->prescaler_mode << 5;  in cx24113_set_parameters()
150 	cx24113_writereg(state, 0x10, r);  in cx24113_set_parameters()
152 	r = (state->icp_auto_low  << 0) | (state->icp_auto_mlow << 2)  in cx24113_set_parameters()
154 	cx24113_writereg(state, 0x11, r);  in cx24113_set_parameters()
157 		r = cx24113_readreg(state, 0x20) & 0xec;  in cx24113_set_parameters()
158 		r |= state->lna_gain;  in cx24113_set_parameters()
159 		r |= state->rfvga_bias_ctrl << 4;  in cx24113_set_parameters()
160 		cx24113_writereg(state, 0x20, r);  in cx24113_set_parameters()
163 	r = cx24113_readreg(state, 0x12) & 0x03;  in cx24113_set_parameters()
164 	r |= state->acp_on << 2;  in cx24113_set_parameters()
165 	r |= state->bs_delay << 4;  in cx24113_set_parameters()
166 	cx24113_writereg(state, 0x12, r);  in cx24113_set_parameters()
168 	r = cx24113_readreg(state, 0x18) & 0x40;  in cx24113_set_parameters()
169 	r |= state->vco_shift;  in cx24113_set_parameters()
171 		r |= (1 << 7);  in cx24113_set_parameters()
173 		r |= (state->vco_band << 1);  in cx24113_set_parameters()
174 	cx24113_writereg(state, 0x18, r);  in cx24113_set_parameters()
176 	r  = cx24113_readreg(state, 0x14) & 0x20;  in cx24113_set_parameters()
177 	r |= (state->vco_mode << 6) | ((state->bs_freqcnt >> 8) & 0x1f);  in cx24113_set_parameters()
178 	cx24113_writereg(state, 0x14, r);  in cx24113_set_parameters()
182 	r = (cx24113_readreg(state, 0x17) & 0x0f) |  in cx24113_set_parameters()
184 	cx24113_writereg(state, 0x17, r);  in cx24113_set_parameters()
256 	u8 r;  in cx24113_set_bandwidth()  local
259 		r = 0x03 << 6;  in cx24113_set_bandwidth()
261 		r = 0x02 << 6;  in cx24113_set_bandwidth()
263 		r = 0x01 << 6;  in cx24113_set_bandwidth()
272 	dprintk("bandwidth: %d %d\n", r >> 6, bandwidth_khz);  in cx24113_set_bandwidth()
274 	r |= bandwidth_khz & 0x3f;  in cx24113_set_bandwidth()
276 	return cx24113_writereg(state, 0x1e, r);  in cx24113_set_bandwidth()
281 	u8 r = (cx24113_readreg(state, 0x10) & 0x7f) | ((on & 0x1) << 7);  in cx24113_set_clk_inversion()  local
282 	return cx24113_writereg(state, 0x10, r);  in cx24113_set_clk_inversion()
288 	u8 r = (cx24113_readreg(state, 0x10) & 0x02) >> 1;  in cx24113_get_status()  local
289 	if (r)  in cx24113_get_status()
291 	dprintk("PLL locked: %d\n", r);  in cx24113_get_status()
307 	u8 R, r;  in cx24113_calc_pll_nf()  local
366 			r = cx24113_readreg(state, 0x10);  in cx24113_calc_pll_nf()
367 			cx24113_writereg(state, 0x10, r | (1 << 6));  in cx24113_calc_pll_nf()
377 static void cx24113_set_nfr(struct cx24113_state *state, u16 n, s32 f, u8 r)  in cx24113_set_nfr()  argument
390 	cx24113_set_Fref(state, r - 1);  in cx24113_set_nfr()
395 	u8 r = 1; /* or 2 */  in cx24113_set_frequency()  local
399 	r = cx24113_readreg(state, 0x14);  in cx24113_set_frequency()
400 	cx24113_writereg(state, 0x14, r & 0x3f);  in cx24113_set_frequency()
402 	r = cx24113_readreg(state, 0x10);  in cx24113_set_frequency()
403 	cx24113_writereg(state, 0x10, r & 0xbf);  in cx24113_set_frequency()
412 	r = cx24113_readreg(state, 0x18) & 0xbf;  in cx24113_set_frequency()
414 		r |= 1 << 6;  in cx24113_set_frequency()
415 	cx24113_writereg(state, 0x18, r);  in cx24113_set_frequency()
420 	r = cx24113_readreg(state, 0x1c) & 0xef;  in cx24113_set_frequency()
421 	cx24113_writereg(state, 0x1c, r | (1 << 4));  in cx24113_set_frequency()