Lines Matching refs:data
113 u8 reg, u8 write, const u8 *data, u32 len) in ascot2e_i2c_debug() argument
118 DUMP_PREFIX_OFFSET, data, len); in ascot2e_i2c_debug()
122 u8 reg, const u8 *data, u32 len) in ascot2e_write_regs() argument
141 ascot2e_i2c_debug(priv, reg, 1, data, len); in ascot2e_write_regs()
143 memcpy(&buf[1], data, len); in ascot2e_write_regs()
207 u8 reg, u8 data, u8 mask) in ascot2e_set_reg_bits() argument
216 data = ((data & mask) | (rdata & (mask ^ 0xFF))); in ascot2e_set_reg_bits()
218 return ascot2e_write_reg(priv, reg, data); in ascot2e_set_reg_bits()
223 u8 data[2]; in ascot2e_enter_power_save() local
228 data[0] = 0x00; in ascot2e_enter_power_save()
229 data[1] = 0x04; in ascot2e_enter_power_save()
230 ascot2e_write_regs(priv, 0x14, data, 2); in ascot2e_enter_power_save()
238 u8 data[2] = { 0xFB, 0x0F }; in ascot2e_leave_power_save() local
243 ascot2e_write_regs(priv, 0x14, data, 2); in ascot2e_leave_power_save()
322 u8 data[10]; in ascot2e_set_params() local
344 data[0] = 0x00; in ascot2e_set_params()
347 data[0] |= (u8)( in ascot2e_set_params()
352 data[0] |= (u8)( in ascot2e_set_params()
356 ascot2e_set_reg_bits(priv, 0x05, data[0], 0x1c); in ascot2e_set_params()
362 data[0] = (frequency > 500000) ? 16 : 32; in ascot2e_set_params()
365 data[0] = (frequency > 500000) ? 2 : 4; in ascot2e_set_params()
368 data[1] = 0x04; in ascot2e_set_params()
372 data[2] = 18; in ascot2e_set_params()
373 data[3] = 120; in ascot2e_set_params()
374 data[4] = 20; in ascot2e_set_params()
376 data[2] = 48; in ascot2e_set_params()
377 data[3] = 10; in ascot2e_set_params()
378 data[4] = 30; in ascot2e_set_params()
383 data[5] = (frequency > 500000) ? 0x08 : 0x0c; in ascot2e_set_params()
385 data[5] = (frequency > 500000) ? 0x30 : 0x38; in ascot2e_set_params()
387 data[6] = ascot2e_sett[tv_system].mix_oll; in ascot2e_set_params()
393 data[7] = 0x00; in ascot2e_set_params()
397 data[7] = ascot2e_sett[tv_system].rf_gain; in ascot2e_set_params()
400 data[8] = (u8)((ascot2e_sett[tv_system].fif_offset << 3) | in ascot2e_set_params()
403 data[9] = ascot2e_sett[tv_system].bw_offset; in ascot2e_set_params()
404 ascot2e_write_regs(priv, 0x06, data, 10); in ascot2e_set_params()
412 data[0] = 0x0F; in ascot2e_set_params()
413 data[1] = 0x00; in ascot2e_set_params()
414 data[2] = 0x01; in ascot2e_set_params()
416 data[0] = 0x0F; in ascot2e_set_params()
417 data[1] = 0x00; in ascot2e_set_params()
418 data[2] = 0x03; in ascot2e_set_params()
420 ascot2e_write_regs(priv, 0x45, data, 3); in ascot2e_set_params()
423 data[0] = ascot2e_sett[tv_system].rf_oldet; in ascot2e_set_params()
425 data[1] = ascot2e_sett[tv_system].if_bpf_f0; in ascot2e_set_params()
426 ascot2e_write_regs(priv, 0x49, data, 2); in ascot2e_set_params()
435 data[0] = 0xc4; in ascot2e_set_params()
436 data[1] = 0x40; in ascot2e_set_params()
437 ascot2e_write_regs(priv, 0x03, data, 2); in ascot2e_set_params()
439 data[0] = (u8)(frequency & 0xFF); /* 0x10: FRF_L */ in ascot2e_set_params()
440 data[1] = (u8)((frequency >> 8) & 0xFF); /* 0x11: FRF_M */ in ascot2e_set_params()
441 data[2] = (u8)((frequency >> 16) & 0x0F); /* 0x12: FRF_H (bit[3:0]) */ in ascot2e_set_params()
443 data[2] |= (u8)(ascot2e_sett[tv_system].bw << 4); in ascot2e_set_params()
444 data[3] = 0xFF; /* 0x13: VCO calibration enable */ in ascot2e_set_params()
445 data[4] = 0xFF; /* 0x14: Analog block enable */ in ascot2e_set_params()
447 ascot2e_write_regs(priv, 0x10, data, 5); in ascot2e_set_params()
485 u8 data[4]; in ascot2e_attach() local
500 data[0] = 16; in ascot2e_attach()
502 data[1] = 0x06; in ascot2e_attach()
504 data[2] = 0xC4; in ascot2e_attach()
505 data[3] = 0x40; in ascot2e_attach()
506 ascot2e_write_regs(priv, 0x01, data, 4); in ascot2e_attach()
508 data[0] = 0x10; in ascot2e_attach()
509 data[1] = 0x3F; in ascot2e_attach()
510 data[2] = 0x25; in ascot2e_attach()
511 ascot2e_write_regs(priv, 0x22, data, 3); in ascot2e_attach()
527 data[0] = 0x00; in ascot2e_attach()
528 data[1] = 0x04; in ascot2e_attach()
529 ascot2e_write_regs(priv, 0x14, data, 2); in ascot2e_attach()