Lines Matching refs:cs
66 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
68 return (readreg(cs->hw.mic.adr, cs->hw.mic.isac, offset)); in ReadISAC()
72 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
74 writereg(cs->hw.mic.adr, cs->hw.mic.isac, offset, value); in WriteISAC()
78 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
80 readfifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size); in ReadISACfifo()
84 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
86 writefifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size); in WriteISACfifo()
90 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
92 return (readreg(cs->hw.mic.adr, in ReadHSCX()
93 cs->hw.mic.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX()
97 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument
99 writereg(cs->hw.mic.adr, in WriteHSCX()
100 cs->hw.mic.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX()
107 #define READHSCX(cs, nr, reg) readreg(cs->hw.mic.adr, \ argument
108 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0))
109 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.mic.adr, \ argument
110 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0), data)
112 #define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.mic.adr, \ argument
113 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
115 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.mic.adr, \ argument
116 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
123 struct IsdnCardState *cs = dev_id; in mic_interrupt() local
127 spin_lock_irqsave(&cs->lock, flags); in mic_interrupt()
128 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); in mic_interrupt()
131 hscx_int_main(cs, val); in mic_interrupt()
132 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA); in mic_interrupt()
135 isac_interrupt(cs, val); in mic_interrupt()
136 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); in mic_interrupt()
138 if (cs->debug & L1_DEB_HSCX) in mic_interrupt()
139 debugl1(cs, "HSCX IntStat after IntRoutine"); in mic_interrupt()
142 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA); in mic_interrupt()
144 if (cs->debug & L1_DEB_ISAC) in mic_interrupt()
145 debugl1(cs, "ISAC IntStat after IntRoutine"); in mic_interrupt()
148 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK, 0xFF); in mic_interrupt()
149 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0xFF); in mic_interrupt()
150 writereg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_MASK, 0xFF); in mic_interrupt()
151 writereg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_MASK, 0x0); in mic_interrupt()
152 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK, 0x0); in mic_interrupt()
153 writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0x0); in mic_interrupt()
154 spin_unlock_irqrestore(&cs->lock, flags); in mic_interrupt()
159 release_io_mic(struct IsdnCardState *cs) in release_io_mic() argument
163 if (cs->hw.mic.cfg_reg) in release_io_mic()
164 release_region(cs->hw.mic.cfg_reg, bytecnt); in release_io_mic()
168 mic_card_msg(struct IsdnCardState *cs, int mt, void *arg) in mic_card_msg() argument
176 release_io_mic(cs); in mic_card_msg()
179 spin_lock_irqsave(&cs->lock, flags); in mic_card_msg()
180 inithscx(cs); /* /RTSA := ISAC RST */ in mic_card_msg()
181 inithscxisac(cs, 3); in mic_card_msg()
182 spin_unlock_irqrestore(&cs->lock, flags); in mic_card_msg()
193 struct IsdnCardState *cs = card->cs; in setup_mic() local
198 if (cs->typ != ISDN_CTYPE_MIC) in setup_mic()
202 cs->hw.mic.cfg_reg = card->para[1]; in setup_mic()
203 cs->irq = card->para[0]; in setup_mic()
204 cs->hw.mic.adr = cs->hw.mic.cfg_reg + MIC_ADR; in setup_mic()
205 cs->hw.mic.isac = cs->hw.mic.cfg_reg + MIC_ISAC; in setup_mic()
206 cs->hw.mic.hscx = cs->hw.mic.cfg_reg + MIC_HSCX; in setup_mic()
208 if (!request_region(cs->hw.mic.cfg_reg, bytecnt, "mic isdn")) { in setup_mic()
211 cs->hw.mic.cfg_reg, in setup_mic()
212 cs->hw.mic.cfg_reg + bytecnt); in setup_mic()
216 cs->hw.mic.cfg_reg, cs->irq); in setup_mic()
217 setup_isac(cs); in setup_mic()
218 cs->readisac = &ReadISAC; in setup_mic()
219 cs->writeisac = &WriteISAC; in setup_mic()
220 cs->readisacfifo = &ReadISACfifo; in setup_mic()
221 cs->writeisacfifo = &WriteISACfifo; in setup_mic()
222 cs->BC_Read_Reg = &ReadHSCX; in setup_mic()
223 cs->BC_Write_Reg = &WriteHSCX; in setup_mic()
224 cs->BC_Send_Data = &hscx_fill_fifo; in setup_mic()
225 cs->cardmsg = &mic_card_msg; in setup_mic()
226 cs->irq_func = &mic_interrupt; in setup_mic()
227 ISACVersion(cs, "mic:"); in setup_mic()
228 if (HscxVersion(cs, "mic:")) { in setup_mic()
231 release_io_mic(cs); in setup_mic()