24 JadeVersion(struct IsdnCardState *cs, char *s)  in JadeVersion()  argument
28 	cs->BC_Write_Reg(cs, -1, 0x50, 0x19);  in JadeVersion()
31 		ver = cs->BC_Read_Reg(cs, -1, 0x60);  in JadeVersion()
43 	ver = cs->BC_Read_Reg(cs, -1, 0x60);  in JadeVersion()
50 jade_write_indirect(struct IsdnCardState *cs, u_char reg, u_char value)  in jade_write_indirect()  argument
56 	cs->BC_Write_Reg(cs, -1, COMM_JADE + 1, value);  in jade_write_indirect()
58 	cs->BC_Write_Reg(cs, -1, COMM_JADE, reg);  in jade_write_indirect()
63 		ret = cs->BC_Read_Reg(cs, -1, COMM_JADE);  in jade_write_indirect()
80 	struct IsdnCardState *cs = bcs->cs;  in modejade()  local
83 	if (cs->debug & L1_DEB_HSCX) {  in modejade()
84 		debugl1(cs, "jade %c mode %d ichan %d", 'A' + jade, mode, bc);  in modejade()
89 	cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (mode == L1_MODE_TRANS ? jadeMODE_TMO : 0x00));  in modejade()
90 	cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR0, (jadeCCR0_PU | jadeCCR0_ITF));  in modejade()
91 	cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR1, 0x00);  in modejade()
93 	jade_write_indirect(cs, jade_HDLC1SERRXPATH, 0x08);  in modejade()
94 	jade_write_indirect(cs, jade_HDLC2SERRXPATH, 0x08);  in modejade()
95 	jade_write_indirect(cs, jade_HDLC1SERTXPATH, 0x00);  in modejade()
96 	jade_write_indirect(cs, jade_HDLC2SERTXPATH, 0x00);  in modejade()
98 	cs->BC_Write_Reg(cs, jade, jade_HDLC_XCCR, 0x07);  in modejade()
99 	cs->BC_Write_Reg(cs, jade, jade_HDLC_RCCR, 0x07);  in modejade()
102 		cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x00);  in modejade()
103 		cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x00);  in modejade()
105 		cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x04);  in modejade()
106 		cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x04);  in modejade()
110 		cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, jadeMODE_TMO);  in modejade()
113 		cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_TMO | jadeMODE_RAC | jadeMODE_XAC));  in modejade()
116 		cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_RAC | jadeMODE_XAC));  in modejade()
120 		cs->BC_Write_Reg(cs, jade, jade_HDLC_RCMD, (jadeRCMD_RRES | jadeRCMD_RMC));  in modejade()
121 		cs->BC_Write_Reg(cs, jade, jade_HDLC_XCMD, jadeXCMD_XRES);  in modejade()
123 		cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0xF8);  in modejade()
127 		cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00);  in modejade()
139 		spin_lock_irqsave(&bcs->cs->lock, flags);  in jade_l2l1()
146 			bcs->cs->BC_Send_Data(bcs);  in jade_l2l1()
148 		spin_unlock_irqrestore(&bcs->cs->lock, flags);  in jade_l2l1()
151 		spin_lock_irqsave(&bcs->cs->lock, flags);  in jade_l2l1()
158 			bcs->cs->BC_Send_Data(bcs);  in jade_l2l1()
160 		spin_unlock_irqrestore(&bcs->cs->lock, flags);  in jade_l2l1()
170 		spin_lock_irqsave(&bcs->cs->lock, flags);  in jade_l2l1()
173 		spin_unlock_irqrestore(&bcs->cs->lock, flags);  in jade_l2l1()
180 		spin_lock_irqsave(&bcs->cs->lock, flags);  in jade_l2l1()
184 		spin_unlock_irqrestore(&bcs->cs->lock, flags);  in jade_l2l1()
210 open_jadestate(struct IsdnCardState *cs, struct BCState *bcs)  in open_jadestate()  argument
254 clear_pending_jade_ints(struct IsdnCardState *cs)  in clear_pending_jade_ints()  argument
258 	cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR, 0x00);  in clear_pending_jade_ints()
259 	cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR, 0x00);  in clear_pending_jade_ints()
261 	val = cs->BC_Read_Reg(cs, 1, jade_HDLC_ISR);  in clear_pending_jade_ints()
262 	debugl1(cs, "jade B ISTA %x", val);  in clear_pending_jade_ints()
263 	val = cs->BC_Read_Reg(cs, 0, jade_HDLC_ISR);  in clear_pending_jade_ints()
264 	debugl1(cs, "jade A ISTA %x", val);  in clear_pending_jade_ints()
265 	val = cs->BC_Read_Reg(cs, 1, jade_HDLC_STAR);  in clear_pending_jade_ints()
266 	debugl1(cs, "jade B STAR %x", val);  in clear_pending_jade_ints()
267 	val = cs->BC_Read_Reg(cs, 0, jade_HDLC_STAR);  in clear_pending_jade_ints()
268 	debugl1(cs, "jade A STAR %x", val);  in clear_pending_jade_ints()
270 	cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR, 0xF8);  in clear_pending_jade_ints()
271 	cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR, 0xF8);  in clear_pending_jade_ints()
275 initjade(struct IsdnCardState *cs)  in initjade()  argument
277 	cs->bcs[0].BC_SetStack = setstack_jade;  in initjade()
278 	cs->bcs[1].BC_SetStack = setstack_jade;  in initjade()
279 	cs->bcs[0].BC_Close = close_jadestate;  in initjade()
280 	cs->bcs[1].BC_Close = close_jadestate;  in initjade()
281 	cs->bcs[0].hw.hscx.hscx = 0;  in initjade()
282 	cs->bcs[1].hw.hscx.hscx = 1;  in initjade()
285 	jade_write_indirect(cs, 0x11, 0x0f);  in initjade()
286 	jade_write_indirect(cs, 0x17, 0x2f);  in initjade()
289 	cs->BC_Write_Reg(cs, 0, jade_HDLC_MODE, jadeMODE_TMO);  in initjade()
290 	cs->BC_Write_Reg(cs, 1, jade_HDLC_MODE, jadeMODE_TMO);  in initjade()
292 	cs->BC_Write_Reg(cs, 0, jade_HDLC_CCR0, 0x00);  in initjade()
293 	cs->BC_Write_Reg(cs, 1, jade_HDLC_CCR0, 0x00);  in initjade()
295 	cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR,  0x00);  in initjade()
296 	cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR,  0x00);  in initjade()
298 	jade_write_indirect(cs, jade_HDLCCNTRACCESS, (jadeINDIRECT_HAH1 | jadeINDIRECT_HAH2));  in initjade()
300 	cs->BC_Write_Reg(cs, -1, jade_INT, (jadeINT_HDLC1 | jadeINT_HDLC2));  in initjade()
303 	modejade(cs->bcs, 0, 0);  in initjade()
304 	modejade(cs->bcs + 1, 0, 0);  in initjade()