Lines Matching refs:cs
104 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
108 switch (cs->subtyp) { in ReadISAC()
112 return (readreg(cs->hw.gazel.isac, off2)); in ReadISAC()
115 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2)); in ReadISAC()
121 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
125 switch (cs->subtyp) { in WriteISAC()
129 writereg(cs->hw.gazel.isac, off2, value); in WriteISAC()
133 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value); in WriteISAC()
139 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
141 switch (cs->subtyp) { in ReadISACfifo()
144 read_fifo(cs->hw.gazel.isacfifo, data, size); in ReadISACfifo()
148 read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); in ReadISACfifo()
154 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
156 switch (cs->subtyp) { in WriteISACfifo()
159 write_fifo(cs->hw.gazel.isacfifo, data, size); in WriteISACfifo()
163 write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); in WriteISACfifo()
169 ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size) in ReadHSCXfifo() argument
171 switch (cs->subtyp) { in ReadHSCXfifo()
174 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); in ReadHSCXfifo()
178 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); in ReadHSCXfifo()
184 WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size) in WriteHSCXfifo() argument
186 switch (cs->subtyp) { in WriteHSCXfifo()
189 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); in WriteHSCXfifo()
193 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); in WriteHSCXfifo()
199 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
203 switch (cs->subtyp) { in ReadHSCX()
207 return (readreg(cs->hw.gazel.hscx[hscx], off2)); in ReadHSCX()
210 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2)); in ReadHSCX()
216 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument
220 switch (cs->subtyp) { in WriteHSCX()
224 writereg(cs->hw.gazel.hscx[hscx], off2, value); in WriteHSCX()
228 writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value); in WriteHSCX()
237 #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg) argument
238 #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data) argument
239 #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt) argument
240 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt) argument
248 struct IsdnCardState *cs = dev_id; in gazel_interrupt() local
253 spin_lock_irqsave(&cs->lock, flags); in gazel_interrupt()
255 valhscx = ReadHSCX(cs, 1, HSCX_ISTA); in gazel_interrupt()
257 hscx_int_main(cs, valhscx); in gazel_interrupt()
258 valisac = ReadISAC(cs, ISAC_ISTA); in gazel_interrupt()
260 isac_interrupt(cs, valisac); in gazel_interrupt()
264 WriteHSCX(cs, 0, HSCX_MASK, 0xFF); in gazel_interrupt()
265 WriteHSCX(cs, 1, HSCX_MASK, 0xFF); in gazel_interrupt()
266 WriteISAC(cs, ISAC_MASK, 0xFF); in gazel_interrupt()
267 WriteISAC(cs, ISAC_MASK, 0x0); in gazel_interrupt()
268 WriteHSCX(cs, 0, HSCX_MASK, 0x0); in gazel_interrupt()
269 WriteHSCX(cs, 1, HSCX_MASK, 0x0); in gazel_interrupt()
270 spin_unlock_irqrestore(&cs->lock, flags); in gazel_interrupt()
278 struct IsdnCardState *cs = dev_id; in gazel_interrupt_ipac() local
283 spin_lock_irqsave(&cs->lock, flags); in gazel_interrupt_ipac()
284 ista = ReadISAC(cs, IPAC_ISTA - 0x80); in gazel_interrupt_ipac()
287 val = ReadHSCX(cs, 1, HSCX_ISTA); in gazel_interrupt_ipac()
295 hscx_int_main(cs, val); in gazel_interrupt_ipac()
299 val = 0xfe & ReadISAC(cs, ISAC_ISTA); in gazel_interrupt_ipac()
301 isac_interrupt(cs, val); in gazel_interrupt_ipac()
306 isac_interrupt(cs, val); in gazel_interrupt_ipac()
308 ista = ReadISAC(cs, IPAC_ISTA - 0x80); in gazel_interrupt_ipac()
313 WriteISAC(cs, IPAC_MASK - 0x80, 0xFF); in gazel_interrupt_ipac()
314 WriteISAC(cs, IPAC_MASK - 0x80, 0xC0); in gazel_interrupt_ipac()
315 spin_unlock_irqrestore(&cs->lock, flags); in gazel_interrupt_ipac()
320 release_io_gazel(struct IsdnCardState *cs) in release_io_gazel() argument
324 switch (cs->subtyp) { in release_io_gazel()
327 release_region(i + cs->hw.gazel.hscx[0], 16); in release_io_gazel()
328 release_region(0xC000 + cs->hw.gazel.hscx[0], 1); in release_io_gazel()
332 release_region(cs->hw.gazel.hscx[0], 0x100); in release_io_gazel()
333 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
337 release_region(cs->hw.gazel.ipac, 0x8); in release_io_gazel()
338 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
342 release_region(cs->hw.gazel.ipac, 8); in release_io_gazel()
348 reset_gazel(struct IsdnCardState *cs) in reset_gazel() argument
350 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg; in reset_gazel()
352 switch (cs->subtyp) { in reset_gazel()
374 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); in reset_gazel()
378 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); in reset_gazel()
379 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); in reset_gazel()
380 WriteISAC(cs, IPAC_AOE - 0x80, 0x0); in reset_gazel()
381 WriteISAC(cs, IPAC_MASK - 0x80, 0xff); in reset_gazel()
382 WriteISAC(cs, IPAC_CONF - 0x80, 0x1); in reset_gazel()
384 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); in reset_gazel()
387 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); in reset_gazel()
389 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); in reset_gazel()
390 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); in reset_gazel()
391 WriteISAC(cs, IPAC_AOE - 0x80, 0x0); in reset_gazel()
392 WriteISAC(cs, IPAC_MASK - 0x80, 0xff); in reset_gazel()
393 WriteISAC(cs, IPAC_CONF - 0x80, 0x1); in reset_gazel()
394 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); in reset_gazel()
401 Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg) in Gazel_card_msg() argument
407 spin_lock_irqsave(&cs->lock, flags); in Gazel_card_msg()
408 reset_gazel(cs); in Gazel_card_msg()
409 spin_unlock_irqrestore(&cs->lock, flags); in Gazel_card_msg()
412 release_io_gazel(cs); in Gazel_card_msg()
415 spin_lock_irqsave(&cs->lock, flags); in Gazel_card_msg()
416 inithscxisac(cs, 1); in Gazel_card_msg()
417 if ((cs->subtyp == R647) || (cs->subtyp == R685)) { in Gazel_card_msg()
420 cs->bcs[i].hw.hscx.tsaxr0 = 0x1f; in Gazel_card_msg()
421 cs->bcs[i].hw.hscx.tsaxr1 = 0x23; in Gazel_card_msg()
424 spin_unlock_irqrestore(&cs->lock, flags); in Gazel_card_msg()
433 reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs) in reserve_regions() argument
437 switch (cs->subtyp) { in reserve_regions()
439 base = cs->hw.gazel.hscx[0]; in reserve_regions()
455 if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel")) in reserve_regions()
457 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { in reserve_regions()
458 release_region(cs->hw.gazel.hscx[0], 0x100); in reserve_regions()
464 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) in reserve_regions()
466 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { in reserve_regions()
467 release_region(cs->hw.gazel.ipac, 8); in reserve_regions()
473 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) in reserve_regions()
486 static int setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs) in setup_gazelisa() argument
494 cs->subtyp = R742; in setup_gazelisa()
496 cs->subtyp = R647; in setup_gazelisa()
498 setup_isac(cs); in setup_gazelisa()
499 cs->hw.gazel.cfg_reg = card->para[1] + 0xC000; in setup_gazelisa()
500 cs->hw.gazel.ipac = card->para[1]; in setup_gazelisa()
501 cs->hw.gazel.isac = card->para[1] + 0x8000; in setup_gazelisa()
502 cs->hw.gazel.hscx[0] = card->para[1]; in setup_gazelisa()
503 cs->hw.gazel.hscx[1] = card->para[1] + 0x4000; in setup_gazelisa()
504 cs->irq = card->para[0]; in setup_gazelisa()
505 cs->hw.gazel.isacfifo = cs->hw.gazel.isac; in setup_gazelisa()
506 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; in setup_gazelisa()
507 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; in setup_gazelisa()
509 switch (cs->subtyp) { in setup_gazelisa()
512 cs->dc.isac.adf2 = 0x87; in setup_gazelisa()
515 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); in setup_gazelisa()
518 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); in setup_gazelisa()
523 test_and_set_bit(HW_IPAC, &cs->HW_Flags); in setup_gazelisa()
526 cs->irq, cs->hw.gazel.ipac); in setup_gazelisa()
536 static int setup_gazelpci(struct IsdnCardState *cs) in setup_gazelpci() argument
580 cs->hw.gazel.pciaddr[0] = pci_ioaddr0; in setup_gazelpci()
581 cs->hw.gazel.pciaddr[1] = pci_ioaddr1; in setup_gazelpci()
582 setup_isac(cs); in setup_gazelpci()
584 cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe; in setup_gazelpci()
585 cs->hw.gazel.ipac = pci_ioaddr1; in setup_gazelpci()
586 cs->hw.gazel.isac = pci_ioaddr1 + 0x80; in setup_gazelpci()
587 cs->hw.gazel.hscx[0] = pci_ioaddr1; in setup_gazelpci()
588 cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40; in setup_gazelpci()
589 cs->hw.gazel.isacfifo = cs->hw.gazel.isac; in setup_gazelpci()
590 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; in setup_gazelpci()
591 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; in setup_gazelpci()
592 cs->irq = pci_irq; in setup_gazelpci()
593 cs->irq_flags |= IRQF_SHARED; in setup_gazelpci()
598 cs->subtyp = R685; in setup_gazelpci()
599 cs->dc.isac.adf2 = 0x87; in setup_gazelpci()
602 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); in setup_gazelpci()
605 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); in setup_gazelpci()
611 cs->subtyp = R753; in setup_gazelpci()
612 test_and_set_bit(HW_IPAC, &cs->HW_Flags); in setup_gazelpci()
615 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg); in setup_gazelpci()
625 struct IsdnCardState *cs = card->cs; in setup_gazel() local
632 if (cs->typ != ISDN_CTYPE_GAZEL) in setup_gazel()
636 if (setup_gazelisa(card, cs)) in setup_gazel()
641 if (setup_gazelpci(cs)) in setup_gazel()
649 if (reserve_regions(card, cs)) { in setup_gazel()
652 if (reset_gazel(cs)) { in setup_gazel()
654 release_io_gazel(cs); in setup_gazel()
657 cs->readisac = &ReadISAC; in setup_gazel()
658 cs->writeisac = &WriteISAC; in setup_gazel()
659 cs->readisacfifo = &ReadISACfifo; in setup_gazel()
660 cs->writeisacfifo = &WriteISACfifo; in setup_gazel()
661 cs->BC_Read_Reg = &ReadHSCX; in setup_gazel()
662 cs->BC_Write_Reg = &WriteHSCX; in setup_gazel()
663 cs->BC_Send_Data = &hscx_fill_fifo; in setup_gazel()
664 cs->cardmsg = &Gazel_card_msg; in setup_gazel()
666 switch (cs->subtyp) { in setup_gazel()
669 cs->irq_func = &gazel_interrupt; in setup_gazel()
670 ISACVersion(cs, "Gazel:"); in setup_gazel()
671 if (HscxVersion(cs, "Gazel:")) { in setup_gazel()
674 release_io_gazel(cs); in setup_gazel()
680 cs->irq_func = &gazel_interrupt_ipac; in setup_gazel()
681 val = ReadISAC(cs, IPAC_ID - 0x80); in setup_gazel()