Lines Matching refs:hw
145 struct hfcPCI_hw hw; member
155 hc->hw.int_m2 |= HFCPCI_IRQ_ENABLE; in enable_hwirq()
156 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in enable_hwirq()
162 hc->hw.int_m2 &= ~((u_char)HFCPCI_IRQ_ENABLE); in disable_hwirq()
163 Write_hfc(hc, HFCPCI_INT_M2, hc->hw.int_m2); in disable_hwirq()
174 del_timer(&hc->hw.timer); in release_io_hfcpci()
175 pci_free_consistent(hc->pdev, 0x8000, hc->hw.fifos, hc->hw.dmahandle); in release_io_hfcpci()
176 iounmap(hc->hw.pci_io); in release_io_hfcpci()
185 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_setmode()
186 hc->hw.clkdel = CLKDEL_NT; /* ST-Bit delay for NT-Mode */ in hfcpci_setmode()
187 hc->hw.sctrl |= SCTRL_MODE_NT; /* NT-MODE */ in hfcpci_setmode()
188 hc->hw.states = 1; /* G1 */ in hfcpci_setmode()
190 hc->hw.clkdel = CLKDEL_TE; /* ST-Bit delay for TE-Mode */ in hfcpci_setmode()
191 hc->hw.sctrl &= ~SCTRL_MODE_NT; /* TE-MODE */ in hfcpci_setmode()
192 hc->hw.states = 2; /* F2 */ in hfcpci_setmode()
194 Write_hfc(hc, HFCPCI_CLKDEL, hc->hw.clkdel); in hfcpci_setmode()
195 Write_hfc(hc, HFCPCI_STATES, HFCPCI_LOAD_STATE | hc->hw.states); in hfcpci_setmode()
197 Write_hfc(hc, HFCPCI_STATES, hc->hw.states | 0x40); /* Deactivate */ in hfcpci_setmode()
198 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in hfcpci_setmode()
222 hc->hw.cirm = HFCPCI_RESET; /* Reset On */ in reset_hfcpci()
223 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
226 hc->hw.cirm = 0; /* Reset Off */ in reset_hfcpci()
227 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in reset_hfcpci()
239 hc->hw.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci()
241 hc->hw.bswapped = 0; /* no exchange */ in reset_hfcpci()
242 hc->hw.ctmt = HFCPCI_TIM3_125 | HFCPCI_AUTO_TIMER; in reset_hfcpci()
243 hc->hw.trm = HFCPCI_BTRANS_THRESMASK; /* no echo connect , threshold */ in reset_hfcpci()
244 hc->hw.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */ in reset_hfcpci()
245 hc->hw.sctrl_r = 0; in reset_hfcpci()
246 hc->hw.sctrl_e = HFCPCI_AUTO_AWAKE; /* S/T Auto awake */ in reset_hfcpci()
247 hc->hw.mst_m = 0; in reset_hfcpci()
249 hc->hw.mst_m |= HFCPCI_MASTER; /* HFC Master Mode */ in reset_hfcpci()
251 hc->hw.mst_m |= HFCPCI_F0_NEGATIV; in reset_hfcpci()
252 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in reset_hfcpci()
253 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in reset_hfcpci()
254 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in reset_hfcpci()
255 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in reset_hfcpci()
257 hc->hw.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC | in reset_hfcpci()
259 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in reset_hfcpci()
267 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in reset_hfcpci()
268 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in reset_hfcpci()
281 hc->hw.conn = 0x09; in reset_hfcpci()
283 hc->hw.conn = 0x36; /* set data flow directions */ in reset_hfcpci()
296 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in reset_hfcpci()
306 hc->hw.timer.expires = jiffies + 75; in hfcpci_Timer()
341 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx()
342 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()
344 bzr = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx()
345 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()
348 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()
349 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
350 hc->hw.last_bfifo_cnt[fifo] = 0; in hfcpci_clear_fifo_rx()
357 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()
358 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_rx()
370 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx()
371 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()
373 bzt = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx()
374 fifo_state = hc->hw.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()
377 hc->hw.fifo_en ^= fifo_state; in hfcpci_clear_fifo_tx()
378 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
391 hc->hw.fifo_en |= fifo_state; in hfcpci_clear_fifo_tx()
392 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in hfcpci_clear_fifo_tx()
474 df = &((union fifo_area *)(hc->hw.fifos))->d_chan.d_rx; in receive_dmsg()
613 struct hfc_pci *hc = bch->hw; in main_rec_hfcpci()
620 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in main_rec_hfcpci()
621 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci()
622 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in main_rec_hfcpci()
623 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b2; in main_rec_hfcpci()
626 rxbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b1; in main_rec_hfcpci()
627 txbz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in main_rec_hfcpci()
628 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b1; in main_rec_hfcpci()
652 if (hc->hw.last_bfifo_cnt[real_fifo] > rcnt + 1) { in main_rec_hfcpci()
656 hc->hw.last_bfifo_cnt[real_fifo] = rcnt; in main_rec_hfcpci()
691 df = &((union fifo_area *) (hc->hw.fifos))->d_chan.d_tx; in hfcpci_fill_dfifo()
754 struct hfc_pci *hc = bch->hw; in hfcpci_fill_fifo()
772 if ((bch->nr & 2) && (!hc->hw.bswapped)) { in hfcpci_fill_fifo()
773 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b2; in hfcpci_fill_fifo()
774 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b2; in hfcpci_fill_fifo()
776 bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.txbz_b1; in hfcpci_fill_fifo()
777 bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.txdat_b1; in hfcpci_fill_fifo()
953 struct hfc_pci *hc = dch->hw; in handle_nt_timer3()
956 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in handle_nt_timer3()
957 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in handle_nt_timer3()
958 hc->hw.nt_timer = 0; in handle_nt_timer3()
961 hc->hw.mst_m |= HFCPCI_MASTER; in handle_nt_timer3()
962 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in handle_nt_timer3()
970 struct hfc_pci *hc = dch->hw; in ph_state_nt()
977 if (hc->hw.nt_timer < 0) { in ph_state_nt()
978 hc->hw.nt_timer = 0; in ph_state_nt()
981 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
982 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
989 } else if (hc->hw.nt_timer == 0) { in ph_state_nt()
990 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
991 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
992 hc->hw.nt_timer = NT_T1_COUNT; in ph_state_nt()
993 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
994 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
995 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
1006 hc->hw.nt_timer = 0; in ph_state_nt()
1009 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
1010 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1012 hc->hw.mst_m &= ~HFCPCI_MASTER; in ph_state_nt()
1013 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in ph_state_nt()
1019 hc->hw.nt_timer = 0; in ph_state_nt()
1022 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in ph_state_nt()
1023 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1033 hc->hw.int_m1 |= HFCPCI_INTS_TIMER; in ph_state_nt()
1034 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in ph_state_nt()
1035 hc->hw.nt_timer = NT_T3_COUNT; in ph_state_nt()
1036 hc->hw.ctmt &= ~HFCPCI_AUTO_TIMER; in ph_state_nt()
1037 hc->hw.ctmt |= HFCPCI_TIM3_125; in ph_state_nt()
1038 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | in ph_state_nt()
1048 struct hfc_pci *hc = dch->hw; in ph_state()
1050 if (hc->hw.protocol == ISDN_P_NT_S0) { in ph_state()
1052 hc->hw.nt_timer < 0) in ph_state()
1066 struct hfc_pci *hc = dch->hw; in hfc_l1callback()
1072 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1073 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1081 hc->hw.mst_m |= HFCPCI_MASTER; in hfc_l1callback()
1082 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1088 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfc_l1callback()
1089 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfc_l1callback()
1146 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1151 hfcpci_fill_dfifo(dch->hw); in tx_dirq()
1164 if (!(hc->hw.int_m2 & 0x08)) { in hfcpci_int()
1183 val &= hc->hw.int_m1; in hfcpci_int()
1194 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_int()
1195 if ((--hc->hw.nt_timer) < 0) in hfcpci_int()
1199 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | HFCPCI_CLTIMER); in hfcpci_int()
1202 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1216 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in hfcpci_int()
1254 struct hfc_pci *hc = bch->hw; in mode_hfcpci()
1277 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1278 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1282 hc->hw.bswapped = 1; /* B1 and B2 exchanged */ in mode_hfcpci()
1283 hc->hw.sctrl_e |= 0x80; in mode_hfcpci()
1285 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1286 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1290 hc->hw.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1291 hc->hw.sctrl_e &= ~0x80; in mode_hfcpci()
1302 hc->hw.sctrl &= ~SCTRL_B2_ENA; in mode_hfcpci()
1303 hc->hw.sctrl_r &= ~SCTRL_B2_ENA; in mode_hfcpci()
1305 hc->hw.sctrl &= ~SCTRL_B1_ENA; in mode_hfcpci()
1306 hc->hw.sctrl_r &= ~SCTRL_B1_ENA; in mode_hfcpci()
1309 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1310 hc->hw.int_m1 &= ~(HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1313 hc->hw.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1314 hc->hw.int_m1 &= ~(HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1319 hc->hw.cirm &= 0x7f; in mode_hfcpci()
1321 hc->hw.cirm &= 0xbf; in mode_hfcpci()
1334 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1335 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1337 hc->hw.cirm |= 0x80; in mode_hfcpci()
1340 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1341 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1343 hc->hw.cirm |= 0x40; in mode_hfcpci()
1347 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1349 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1351 hc->hw.ctmt |= 2; in mode_hfcpci()
1352 hc->hw.conn &= ~0x18; in mode_hfcpci()
1354 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1356 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1358 hc->hw.ctmt |= 1; in mode_hfcpci()
1359 hc->hw.conn &= ~0x03; in mode_hfcpci()
1369 hc->hw.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1370 hc->hw.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1372 hc->hw.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1373 hc->hw.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1376 hc->hw.last_bfifo_cnt[1] = 0; in mode_hfcpci()
1377 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1378 hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS | in mode_hfcpci()
1380 hc->hw.ctmt &= ~2; in mode_hfcpci()
1381 hc->hw.conn &= ~0x18; in mode_hfcpci()
1383 hc->hw.last_bfifo_cnt[0] = 0; in mode_hfcpci()
1384 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1385 hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS | in mode_hfcpci()
1387 hc->hw.ctmt &= ~1; in mode_hfcpci()
1388 hc->hw.conn &= ~0x03; in mode_hfcpci()
1411 hc->hw.conn &= 0xc7; in mode_hfcpci()
1412 hc->hw.conn |= 0x08; in mode_hfcpci()
1420 hc->hw.conn &= 0xf8; in mode_hfcpci()
1421 hc->hw.conn |= 0x01; in mode_hfcpci()
1430 Write_hfc(hc, HFCPCI_SCTRL_E, hc->hw.sctrl_e); in mode_hfcpci()
1431 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in mode_hfcpci()
1432 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in mode_hfcpci()
1433 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl); in mode_hfcpci()
1434 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in mode_hfcpci()
1435 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in mode_hfcpci()
1436 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in mode_hfcpci()
1438 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in mode_hfcpci()
1446 struct hfc_pci *hc = bch->hw; in set_hfcpci_rxtest()
1463 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1464 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1466 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1467 hc->hw.ctmt |= 2; in set_hfcpci_rxtest()
1468 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1470 hc->hw.cirm |= 0x80; in set_hfcpci_rxtest()
1473 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1474 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1476 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1477 hc->hw.ctmt |= 1; in set_hfcpci_rxtest()
1478 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1480 hc->hw.cirm |= 0x40; in set_hfcpci_rxtest()
1488 hc->hw.sctrl_r |= SCTRL_B2_ENA; in set_hfcpci_rxtest()
1489 hc->hw.last_bfifo_cnt[1] = 0; in set_hfcpci_rxtest()
1490 hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX; in set_hfcpci_rxtest()
1491 hc->hw.int_m1 |= HFCPCI_INTS_B2REC; in set_hfcpci_rxtest()
1492 hc->hw.ctmt &= ~2; in set_hfcpci_rxtest()
1493 hc->hw.conn &= ~0x18; in set_hfcpci_rxtest()
1495 hc->hw.sctrl_r |= SCTRL_B1_ENA; in set_hfcpci_rxtest()
1496 hc->hw.last_bfifo_cnt[0] = 0; in set_hfcpci_rxtest()
1497 hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX; in set_hfcpci_rxtest()
1498 hc->hw.int_m1 |= HFCPCI_INTS_B1REC; in set_hfcpci_rxtest()
1499 hc->hw.ctmt &= ~1; in set_hfcpci_rxtest()
1500 hc->hw.conn &= ~0x03; in set_hfcpci_rxtest()
1507 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in set_hfcpci_rxtest()
1508 Write_hfc(hc, HFCPCI_FIFO_EN, hc->hw.fifo_en); in set_hfcpci_rxtest()
1509 Write_hfc(hc, HFCPCI_SCTRL_R, hc->hw.sctrl_r); in set_hfcpci_rxtest()
1510 Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt); in set_hfcpci_rxtest()
1511 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in set_hfcpci_rxtest()
1513 Write_hfc(hc, HFCPCI_CIRM, hc->hw.cirm); in set_hfcpci_rxtest()
1521 struct hfc_pci *hc = bch->hw; in deactivate_bchannel()
1542 struct hfc_pci *hc = bch->hw; in hfc_bctrl()
1591 struct hfc_pci *hc = dch->hw; in hfcpci_l2l1D()
1603 hfcpci_fill_dfifo(dch->hw); in hfcpci_l2l1D()
1612 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1615 hc->hw.mst_m |= HFCPCI_MASTER; in hfcpci_l2l1D()
1616 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1633 if (hc->hw.protocol == ISDN_P_NT_S0) { in hfcpci_l2l1D()
1653 hc->hw.mst_m &= ~HFCPCI_MASTER; in hfcpci_l2l1D()
1654 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in hfcpci_l2l1D()
1674 struct hfc_pci *hc = bch->hw; in hfcpci_l2l1B()
1764 hc->hw.int_m1 &= ~HFCPCI_INTS_TIMER; in init_card()
1765 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in init_card()
1767 Write_hfc(hc, HFCPCI_MST_MODE, hc->hw.mst_m); in init_card()
1816 hc->hw.conn = (hc->hw.conn & ~7) | 6; in channel_ctrl()
1817 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1828 hc->hw.conn = (hc->hw.conn & ~0x38) | 0x30; in channel_ctrl()
1829 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1832 hc->hw.trm |= 0x80; /* enable IOM-loop */ in channel_ctrl()
1834 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1835 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1836 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1838 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1866 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x36; in channel_ctrl()
1867 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1868 hc->hw.trm |= 0x80; in channel_ctrl()
1869 Write_hfc(hc, HFCPCI_TRM, hc->hw.trm); in channel_ctrl()
1872 hc->hw.conn = (hc->hw.conn & ~0x3f) | 0x09; in channel_ctrl()
1873 Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn); in channel_ctrl()
1874 hc->hw.trm &= 0x7f; /* disable IOM-loop */ in channel_ctrl()
1909 hc->hw.protocol = rq->protocol; in open_dchannel()
1916 if (hc->hw.protocol == ISDN_P_TE_S0) in open_dchannel()
1923 hc->hw.protocol = rq->protocol; in open_dchannel()
1967 struct hfc_pci *hc = dch->hw; in hfc_dctrl()
2008 hc->hw.cirm = 0; in setup_hw()
2015 hc->hw.pci_io = in setup_hw()
2018 if (!hc->hw.pci_io) { in setup_hw()
2025 buffer = pci_alloc_consistent(hc->pdev, 0x8000, &hc->hw.dmahandle); in setup_hw()
2032 hc->hw.fifos = buffer; in setup_hw()
2033 pci_write_config_dword(hc->pdev, 0x80, hc->hw.dmahandle); in setup_hw()
2034 hc->hw.pci_io = ioremap((ulong) hc->hw.pci_io, 256); in setup_hw()
2037 (u_long) hc->hw.pci_io, (u_long) hc->hw.fifos, in setup_hw()
2038 (u_long) hc->hw.dmahandle, hc->irq, HZ); in setup_hw()
2041 hc->hw.int_m2 = 0; in setup_hw()
2043 hc->hw.int_m1 = 0; in setup_hw()
2044 Write_hfc(hc, HFCPCI_INT_M1, hc->hw.int_m1); in setup_hw()
2047 hc->hw.timer.function = (void *) hfcpci_Timer; in setup_hw()
2048 hc->hw.timer.data = (long) hc; in setup_hw()
2049 init_timer(&hc->hw.timer); in setup_hw()
2060 hc->hw.int_m2 = 0; /* interrupt output off ! */ in release_card()
2069 if (hc->hw.protocol == ISDN_P_TE_S0) in release_card()
2092 card->dch.hw = card; in setup_card()
2104 card->bch[i].hw = card; in setup_card()
2278 if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) { in _hfcpci_softirq()
2280 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); in _hfcpci_softirq()
2285 bch = Sel_BCS(hc, hc->hw.bswapped ? 1 : 2); in _hfcpci_softirq()