Lines Matching refs:gc
45 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(irqd); in zevio_irq_ack() local
49 readl(gc->reg_base + regs->ack); in zevio_irq_ack()
78 struct irq_chip_generic *gc; in zevio_of_init() local
109 gc = irq_get_domain_generic_chip(zevio_irq_domain, 0); in zevio_of_init()
110 gc->reg_base = zevio_irq_io; in zevio_of_init()
111 gc->chip_types[0].chip.irq_ack = zevio_irq_ack; in zevio_of_init()
112 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in zevio_of_init()
113 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in zevio_of_init()
114 gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
115 gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
116 gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE; in zevio_of_init()
117 gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET; in zevio_of_init()