Lines Matching refs:d
91 static inline void tegra_ictlr_write_mask(struct irq_data *d, unsigned long reg) in tegra_ictlr_write_mask() argument
93 void __iomem *base = d->chip_data; in tegra_ictlr_write_mask()
96 mask = BIT(d->hwirq % 32); in tegra_ictlr_write_mask()
100 static void tegra_mask(struct irq_data *d) in tegra_mask() argument
102 tegra_ictlr_write_mask(d, ICTLR_CPU_IER_CLR); in tegra_mask()
103 irq_chip_mask_parent(d); in tegra_mask()
106 static void tegra_unmask(struct irq_data *d) in tegra_unmask() argument
108 tegra_ictlr_write_mask(d, ICTLR_CPU_IER_SET); in tegra_unmask()
109 irq_chip_unmask_parent(d); in tegra_unmask()
112 static void tegra_eoi(struct irq_data *d) in tegra_eoi() argument
114 tegra_ictlr_write_mask(d, ICTLR_CPU_IEP_FIR_CLR); in tegra_eoi()
115 irq_chip_eoi_parent(d); in tegra_eoi()
118 static int tegra_retrigger(struct irq_data *d) in tegra_retrigger() argument
120 tegra_ictlr_write_mask(d, ICTLR_CPU_IEP_FIR_SET); in tegra_retrigger()
121 return irq_chip_retrigger_hierarchy(d); in tegra_retrigger()
125 static int tegra_set_wake(struct irq_data *d, unsigned int enable) in tegra_set_wake() argument
127 u32 irq = d->hwirq; in tegra_set_wake()
224 static int tegra_ictlr_domain_translate(struct irq_domain *d, in tegra_ictlr_domain_translate() argument
285 struct irq_data *d = irq_domain_get_irq_data(domain, virq + i); in tegra_ictlr_domain_free() local
286 irq_domain_reset_irq_data(d); in tegra_ictlr_domain_free()