69 	int hw_irq;  member
129 						   int reg, int hw_irq)  in intc_irqpin_hwirq_mask()  argument
131 	return BIT((p->iomem[reg].width - 1) - hw_irq);  in intc_irqpin_hwirq_mask()
135 					       int reg, int hw_irq)  in intc_irqpin_irq_write_hwirq()  argument
137 	intc_irqpin_write(p, reg, intc_irqpin_hwirq_mask(p, reg, hw_irq));  in intc_irqpin_irq_write_hwirq()
190 		str, i->requested_irq, i->hw_irq, i->domain_irq);  in intc_irqpin_dbg()
196 	int hw_irq = irqd_to_hwirq(d);  in intc_irqpin_irq_enable()  local
198 	intc_irqpin_dbg(&p->irq[hw_irq], "enable");  in intc_irqpin_irq_enable()
199 	intc_irqpin_irq_write_hwirq(p, INTC_IRQPIN_REG_CLEAR, hw_irq);  in intc_irqpin_irq_enable()
205 	int hw_irq = irqd_to_hwirq(d);  in intc_irqpin_irq_disable()  local
207 	intc_irqpin_dbg(&p->irq[hw_irq], "disable");  in intc_irqpin_irq_disable()
208 	intc_irqpin_irq_write_hwirq(p, INTC_IRQPIN_REG_MASK, hw_irq);  in intc_irqpin_irq_disable()
214 	int hw_irq = irqd_to_hwirq(d);  in intc_irqpin_shared_irq_enable()  local
216 	intc_irqpin_dbg(&p->irq[hw_irq], "shared enable");  in intc_irqpin_shared_irq_enable()
217 	intc_irqpin_irq_write_hwirq(p, INTC_IRQPIN_REG_CLEAR, hw_irq);  in intc_irqpin_shared_irq_enable()
219 	p->shared_irq_mask &= ~BIT(hw_irq);  in intc_irqpin_shared_irq_enable()
225 	int hw_irq = irqd_to_hwirq(d);  in intc_irqpin_shared_irq_disable()  local
227 	intc_irqpin_dbg(&p->irq[hw_irq], "shared disable");  in intc_irqpin_shared_irq_disable()
228 	intc_irqpin_irq_write_hwirq(p, INTC_IRQPIN_REG_MASK, hw_irq);  in intc_irqpin_shared_irq_disable()
230 	p->shared_irq_mask |= BIT(hw_irq);  in intc_irqpin_shared_irq_disable()
286 	int hw_irq = irqd_to_hwirq(d);  in intc_irqpin_irq_set_wake()  local
288 	irq_set_irq_wake(p->irq[hw_irq].requested_irq, on);  in intc_irqpin_irq_set_wake()
308 	bit = intc_irqpin_hwirq_mask(p, INTC_IRQPIN_REG_SOURCE, i->hw_irq);  in intc_irqpin_irq_handler()
350 	p->irq[hw].hw_irq = hw;  in intc_irqpin_irq_domain_map()