Lines Matching refs:ct
204 struct irq_chip_type *ct; in omap_alloc_gc_of() local
208 ct = gc->chip_types; in omap_alloc_gc_of()
210 ct->type = IRQ_TYPE_LEVEL_MASK; in omap_alloc_gc_of()
211 ct->handler = handle_level_irq; in omap_alloc_gc_of()
213 ct->chip.irq_ack = omap_mask_ack_irq; in omap_alloc_gc_of()
214 ct->chip.irq_mask = irq_gc_mask_disable_reg; in omap_alloc_gc_of()
215 ct->chip.irq_unmask = irq_gc_unmask_enable_reg; in omap_alloc_gc_of()
217 ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; in omap_alloc_gc_of()
219 ct->regs.enable = INTC_MIR_CLEAR0 + 32 * i; in omap_alloc_gc_of()
220 ct->regs.disable = INTC_MIR_SET0 + 32 * i; in omap_alloc_gc_of()
230 struct irq_chip_type *ct; in omap_alloc_gc_legacy() local
234 ct = gc->chip_types; in omap_alloc_gc_legacy()
235 ct->chip.irq_ack = omap_mask_ack_irq; in omap_alloc_gc_legacy()
236 ct->chip.irq_mask = irq_gc_mask_disable_reg; in omap_alloc_gc_legacy()
237 ct->chip.irq_unmask = irq_gc_unmask_enable_reg; in omap_alloc_gc_legacy()
238 ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; in omap_alloc_gc_legacy()
240 ct->regs.enable = INTC_MIR_CLEAR0; in omap_alloc_gc_legacy()
241 ct->regs.disable = INTC_MIR_SET0; in omap_alloc_gc_legacy()