58 static struct icu_chip_data icu_data[MAX_ICU_NR];  variable
71 	if (data == &icu_data[0]) {  in icu_mask_ack_irq()
95 	if (data == &icu_data[0]) {  in icu_mask_irq()
114 	if (data == &icu_data[0]) {  in icu_unmask_irq()
141 		if (irq == icu_data[i].cascade_irq) {  in icu_mux_irq_demux()
142 			domain = icu_data[i].domain;  in icu_mux_irq_demux()
158 			generic_handle_irq(icu_data[i].virq_base + n);  in icu_mux_irq_demux()
204 	handle_domain_irq(icu_data[0].domain, hwirq, regs);  in mmp_handle_irq()
215 	handle_domain_irq(icu_data[0].domain, hwirq, regs);  in mmp2_handle_irq()
225 	icu_data[0].conf_enable = mmp_conf.conf_enable;  in icu_init_irq()
226 	icu_data[0].conf_disable = mmp_conf.conf_disable;  in icu_init_irq()
227 	icu_data[0].conf_mask = mmp_conf.conf_mask;  in icu_init_irq()
228 	icu_data[0].nr_irqs = 64;  in icu_init_irq()
229 	icu_data[0].virq_base = 0;  in icu_init_irq()
230 	icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,  in icu_init_irq()
232 						   &icu_data[0]);  in icu_init_irq()
237 	irq_set_default_host(icu_data[0].domain);  in icu_init_irq()
248 	icu_data[0].conf_enable = mmp2_conf.conf_enable;  in mmp2_init_icu()
249 	icu_data[0].conf_disable = mmp2_conf.conf_disable;  in mmp2_init_icu()
250 	icu_data[0].conf_mask = mmp2_conf.conf_mask;  in mmp2_init_icu()
251 	icu_data[0].nr_irqs = 64;  in mmp2_init_icu()
252 	icu_data[0].virq_base = 0;  in mmp2_init_icu()
253 	icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,  in mmp2_init_icu()
255 						   &icu_data[0]);  in mmp2_init_icu()
256 	icu_data[1].reg_status = mmp_icu_base + 0x150;  in mmp2_init_icu()
257 	icu_data[1].reg_mask = mmp_icu_base + 0x168;  in mmp2_init_icu()
258 	icu_data[1].clr_mfp_irq_base = icu_data[0].virq_base +  in mmp2_init_icu()
259 				icu_data[0].nr_irqs;  in mmp2_init_icu()
260 	icu_data[1].clr_mfp_hwirq = 1;		/* offset to IRQ_MMP2_PMIC_BASE */  in mmp2_init_icu()
261 	icu_data[1].nr_irqs = 2;  in mmp2_init_icu()
262 	icu_data[1].cascade_irq = 4;  in mmp2_init_icu()
263 	icu_data[1].virq_base = icu_data[0].virq_base + icu_data[0].nr_irqs;  in mmp2_init_icu()
264 	icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,  in mmp2_init_icu()
265 						   icu_data[1].virq_base, 0,  in mmp2_init_icu()
267 						   &icu_data[1]);  in mmp2_init_icu()
268 	icu_data[2].reg_status = mmp_icu_base + 0x154;  in mmp2_init_icu()
269 	icu_data[2].reg_mask = mmp_icu_base + 0x16c;  in mmp2_init_icu()
270 	icu_data[2].nr_irqs = 2;  in mmp2_init_icu()
271 	icu_data[2].cascade_irq = 5;  in mmp2_init_icu()
272 	icu_data[2].virq_base = icu_data[1].virq_base + icu_data[1].nr_irqs;  in mmp2_init_icu()
273 	icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,  in mmp2_init_icu()
274 						   icu_data[2].virq_base, 0,  in mmp2_init_icu()
276 						   &icu_data[2]);  in mmp2_init_icu()
277 	icu_data[3].reg_status = mmp_icu_base + 0x180;  in mmp2_init_icu()
278 	icu_data[3].reg_mask = mmp_icu_base + 0x17c;  in mmp2_init_icu()
279 	icu_data[3].nr_irqs = 3;  in mmp2_init_icu()
280 	icu_data[3].cascade_irq = 9;  in mmp2_init_icu()
281 	icu_data[3].virq_base = icu_data[2].virq_base + icu_data[2].nr_irqs;  in mmp2_init_icu()
282 	icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,  in mmp2_init_icu()
283 						   icu_data[3].virq_base, 0,  in mmp2_init_icu()
285 						   &icu_data[3]);  in mmp2_init_icu()
286 	icu_data[4].reg_status = mmp_icu_base + 0x158;  in mmp2_init_icu()
287 	icu_data[4].reg_mask = mmp_icu_base + 0x170;  in mmp2_init_icu()
288 	icu_data[4].nr_irqs = 5;  in mmp2_init_icu()
289 	icu_data[4].cascade_irq = 17;  in mmp2_init_icu()
290 	icu_data[4].virq_base = icu_data[3].virq_base + icu_data[3].nr_irqs;  in mmp2_init_icu()
291 	icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,  in mmp2_init_icu()
292 						   icu_data[4].virq_base, 0,  in mmp2_init_icu()
294 						   &icu_data[4]);  in mmp2_init_icu()
295 	icu_data[5].reg_status = mmp_icu_base + 0x15c;  in mmp2_init_icu()
296 	icu_data[5].reg_mask = mmp_icu_base + 0x174;  in mmp2_init_icu()
297 	icu_data[5].nr_irqs = 15;  in mmp2_init_icu()
298 	icu_data[5].cascade_irq = 35;  in mmp2_init_icu()
299 	icu_data[5].virq_base = icu_data[4].virq_base + icu_data[4].nr_irqs;  in mmp2_init_icu()
300 	icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,  in mmp2_init_icu()
301 						   icu_data[5].virq_base, 0,  in mmp2_init_icu()
303 						   &icu_data[5]);  in mmp2_init_icu()
304 	icu_data[6].reg_status = mmp_icu_base + 0x160;  in mmp2_init_icu()
305 	icu_data[6].reg_mask = mmp_icu_base + 0x178;  in mmp2_init_icu()
306 	icu_data[6].nr_irqs = 2;  in mmp2_init_icu()
307 	icu_data[6].cascade_irq = 51;  in mmp2_init_icu()
308 	icu_data[6].virq_base = icu_data[5].virq_base + icu_data[5].nr_irqs;  in mmp2_init_icu()
309 	icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,  in mmp2_init_icu()
310 						   icu_data[6].virq_base, 0,  in mmp2_init_icu()
312 						   &icu_data[6]);  in mmp2_init_icu()
313 	icu_data[7].reg_status = mmp_icu_base + 0x188;  in mmp2_init_icu()
314 	icu_data[7].reg_mask = mmp_icu_base + 0x184;  in mmp2_init_icu()
315 	icu_data[7].nr_irqs = 2;  in mmp2_init_icu()
316 	icu_data[7].cascade_irq = 55;  in mmp2_init_icu()
317 	icu_data[7].virq_base = icu_data[6].virq_base + icu_data[6].nr_irqs;  in mmp2_init_icu()
318 	icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,  in mmp2_init_icu()
319 						   icu_data[7].virq_base, 0,  in mmp2_init_icu()
321 						   &icu_data[7]);  in mmp2_init_icu()
322 	end = icu_data[7].virq_base + icu_data[7].nr_irqs;  in mmp2_init_icu()
325 		if (irq == icu_data[1].cascade_irq ||  in mmp2_init_icu()
326 		    irq == icu_data[2].cascade_irq ||  in mmp2_init_icu()
327 		    irq == icu_data[3].cascade_irq ||  in mmp2_init_icu()
328 		    irq == icu_data[4].cascade_irq ||  in mmp2_init_icu()
329 		    irq == icu_data[5].cascade_irq ||  in mmp2_init_icu()
330 		    irq == icu_data[6].cascade_irq ||  in mmp2_init_icu()
331 		    irq == icu_data[7].cascade_irq) {  in mmp2_init_icu()
339 	irq_set_default_host(icu_data[0].domain);  in mmp2_init_icu()
360 	icu_data[0].virq_base = 0;  in mmp_init_bases()
361 	icu_data[0].domain = irq_domain_add_linear(node, nr_irqs,  in mmp_init_bases()
363 						   &icu_data[0]);  in mmp_init_bases()
365 		ret = irq_create_mapping(icu_data[0].domain, irq);  in mmp_init_bases()
371 			icu_data[0].virq_base = ret;  in mmp_init_bases()
373 	icu_data[0].nr_irqs = nr_irqs;  in mmp_init_bases()
376 	if (icu_data[0].virq_base) {  in mmp_init_bases()
378 			irq_dispose_mapping(icu_data[0].virq_base + i);  in mmp_init_bases()
380 	irq_domain_remove(icu_data[0].domain);  in mmp_init_bases()
394 	icu_data[0].conf_enable = mmp_conf.conf_enable;  in mmp_of_init()
395 	icu_data[0].conf_disable = mmp_conf.conf_disable;  in mmp_of_init()
396 	icu_data[0].conf_mask = mmp_conf.conf_mask;  in mmp_of_init()
397 	irq_set_default_host(icu_data[0].domain);  in mmp_of_init()
413 	icu_data[0].conf_enable = mmp2_conf.conf_enable;  in mmp2_of_init()
414 	icu_data[0].conf_disable = mmp2_conf.conf_disable;  in mmp2_of_init()
415 	icu_data[0].conf_mask = mmp2_conf.conf_mask;  in mmp2_of_init()
416 	irq_set_default_host(icu_data[0].domain);  in mmp2_of_init()
445 	icu_data[i].reg_status = mmp_icu_base + res.start;  in mmp2_mux_of_init()
451 	icu_data[i].reg_mask = mmp_icu_base + res.start;  in mmp2_mux_of_init()
452 	icu_data[i].cascade_irq = irq_of_parse_and_map(node, 0);  in mmp2_mux_of_init()
453 	if (!icu_data[i].cascade_irq)  in mmp2_mux_of_init()
456 	icu_data[i].virq_base = 0;  in mmp2_mux_of_init()
457 	icu_data[i].domain = irq_domain_add_linear(node, nr_irqs,  in mmp2_mux_of_init()
459 						   &icu_data[i]);  in mmp2_mux_of_init()
461 		ret = irq_create_mapping(icu_data[i].domain, irq);  in mmp2_mux_of_init()
467 			icu_data[i].virq_base = ret;  in mmp2_mux_of_init()
469 	icu_data[i].nr_irqs = nr_irqs;  in mmp2_mux_of_init()
472 		icu_data[i].clr_mfp_irq_base = icu_data[i].virq_base;  in mmp2_mux_of_init()
473 		icu_data[i].clr_mfp_hwirq = mfp_irq;  in mmp2_mux_of_init()
475 	irq_set_chained_handler(icu_data[i].cascade_irq,  in mmp2_mux_of_init()
480 	if (icu_data[i].virq_base) {  in mmp2_mux_of_init()
482 			irq_dispose_mapping(icu_data[i].virq_base + j);  in mmp2_mux_of_init()
484 	irq_domain_remove(icu_data[i].domain);  in mmp2_mux_of_init()