62 static void intc_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask)  in intc_irq_set_mask()  argument
64 	struct irq_chip_regs *regs = &gc->chip_types->regs;  in intc_irq_set_mask()
66 	writel(mask, gc->reg_base + regs->enable);  in intc_irq_set_mask()
67 	writel(~mask, gc->reg_base + regs->disable);  in intc_irq_set_mask()
72 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);  in ingenic_intc_irq_suspend()  local
73 	intc_irq_set_mask(gc, gc->wake_active);  in ingenic_intc_irq_suspend()
78 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);  in ingenic_intc_irq_resume()  local
79 	intc_irq_set_mask(gc, gc->mask_cache);  in ingenic_intc_irq_resume()
91 	struct irq_chip_generic *gc;  in ingenic_intc_of_init()  local
125 		gc = irq_alloc_generic_chip("INTC", 1,  in ingenic_intc_of_init()
130 		gc->wake_enabled = IRQ_MSK(32);  in ingenic_intc_of_init()
132 		ct = gc->chip_types;  in ingenic_intc_of_init()
142 		irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0,  in ingenic_intc_of_init()