Lines Matching refs:writel_relaxed
174 writel_relaxed(mask, gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4); in gic_poke_irq()
210 writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); in gic_eoi_irq()
219 writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_DEACTIVATE); in gic_eoimode1_eoi_irq()
322 writel_relaxed(val | bit, reg); in gic_set_affinity()
341 writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); in gic_handle_irq()
346 writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); in gic_handle_irq()
348 writel_relaxed(irqstat, cpu_base + GIC_CPU_DEACTIVATE); in gic_handle_irq()
468 writel_relaxed(bypass | mode | GICC_ENABLE, cpu_base + GIC_CPU_CTRL); in gic_cpu_if_up()
479 writel_relaxed(GICD_DISABLE, base + GIC_DIST_CTRL); in gic_dist_init()
488 writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); in gic_dist_init()
492 writel_relaxed(GICD_ENABLE, base + GIC_DIST_CTRL); in gic_dist_init()
526 writel_relaxed(GICC_INT_PRI_THRESHOLD, base + GIC_CPU_PRIMASK); in gic_cpu_init()
541 writel_relaxed(val, cpu_base + GIC_CPU_CTRL); in gic_cpu_if_down()
607 writel_relaxed(GICD_DISABLE, dist_base + GIC_DIST_CTRL); in gic_dist_restore()
610 writel_relaxed(gic_data[gic_nr].saved_spi_conf[i], in gic_dist_restore()
614 writel_relaxed(GICD_INT_DEF_PRI_X4, in gic_dist_restore()
618 writel_relaxed(gic_data[gic_nr].saved_spi_target[i], in gic_dist_restore()
622 writel_relaxed(GICD_INT_EN_CLR_X32, in gic_dist_restore()
624 writel_relaxed(gic_data[gic_nr].saved_spi_enable[i], in gic_dist_restore()
629 writel_relaxed(GICD_INT_EN_CLR_X32, in gic_dist_restore()
631 writel_relaxed(gic_data[gic_nr].saved_spi_active[i], in gic_dist_restore()
635 writel_relaxed(GICD_ENABLE, dist_base + GIC_DIST_CTRL); in gic_dist_restore()
686 writel_relaxed(GICD_INT_EN_CLR_X32, in gic_cpu_restore()
688 writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); in gic_cpu_restore()
693 writel_relaxed(GICD_INT_EN_CLR_X32, in gic_cpu_restore()
695 writel_relaxed(ptr[i], dist_base + GIC_DIST_ACTIVE_SET + i * 4); in gic_cpu_restore()
700 writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4); in gic_cpu_restore()
703 writel_relaxed(GICD_INT_DEF_PRI_X4, in gic_cpu_restore()
706 writel_relaxed(GICC_INT_PRI_THRESHOLD, cpu_base + GIC_CPU_PRIMASK); in gic_cpu_restore()
787 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); in gic_raise_softirq()
805 writel_relaxed((cpu_id << 16) | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); in gic_send_sgi()
874 writel_relaxed(val, dist_base + GIC_DIST_TARGET + i*4); in gic_migrate_target()
895 writel_relaxed(val, dist_base + GIC_DIST_SGI_PENDING_CLEAR + i); in gic_migrate_target()
898 writel_relaxed((1 << (new_cpu_id + 16)) | j, in gic_migrate_target()