73 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(aic5_domain, 0);  in aic5_handle()  local
77 	irqnr = irq_reg_readl(bgc, AT91_AIC5_IVR);  in aic5_handle()
78 	irqstat = irq_reg_readl(bgc, AT91_AIC5_ISR);  in aic5_handle()
81 		irq_reg_writel(bgc, 0, AT91_AIC5_EOICR);  in aic5_handle()
89 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);  in aic5_mask()  local
96 	irq_gc_lock(bgc);  in aic5_mask()
100 	irq_gc_unlock(bgc);  in aic5_mask()
106 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);  in aic5_unmask()  local
113 	irq_gc_lock(bgc);  in aic5_unmask()
117 	irq_gc_unlock(bgc);  in aic5_unmask()
123 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);  in aic5_retrigger()  local
126 	irq_gc_lock(bgc);  in aic5_retrigger()
127 	irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR);  in aic5_retrigger()
128 	irq_reg_writel(bgc, 1, AT91_AIC5_ISCR);  in aic5_retrigger()
129 	irq_gc_unlock(bgc);  in aic5_retrigger()
137 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);  in aic5_set_type()  local
141 	irq_gc_lock(bgc);  in aic5_set_type()
142 	irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR);  in aic5_set_type()
143 	smr = irq_reg_readl(bgc, AT91_AIC5_SMR);  in aic5_set_type()
146 		irq_reg_writel(bgc, smr, AT91_AIC5_SMR);  in aic5_set_type()
147 	irq_gc_unlock(bgc);  in aic5_set_type()
157 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);  in aic5_suspend()  local
162 	irq_gc_lock(bgc);  in aic5_suspend()
168 		irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);  in aic5_suspend()
170 			irq_reg_writel(bgc, 1, AT91_AIC5_IECR);  in aic5_suspend()
172 			irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);  in aic5_suspend()
174 	irq_gc_unlock(bgc);  in aic5_suspend()
181 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);  in aic5_resume()  local
186 	irq_gc_lock(bgc);  in aic5_resume()
192 		irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);  in aic5_resume()
194 			irq_reg_writel(bgc, 1, AT91_AIC5_IECR);  in aic5_resume()
196 			irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);  in aic5_resume()
198 	irq_gc_unlock(bgc);  in aic5_resume()
205 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);  in aic5_pm_shutdown()  local
209 	irq_gc_lock(bgc);  in aic5_pm_shutdown()
211 		irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);  in aic5_pm_shutdown()
212 		irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);  in aic5_pm_shutdown()
213 		irq_reg_writel(bgc, 1, AT91_AIC5_ICCR);  in aic5_pm_shutdown()
215 	irq_gc_unlock(bgc);  in aic5_pm_shutdown()
260 	struct irq_chip_generic *bgc = irq_get_domain_generic_chip(d, 0);  in aic5_irq_domain_xlate()  local
264 	if (!bgc)  in aic5_irq_domain_xlate()
272 	irq_gc_lock(bgc);  in aic5_irq_domain_xlate()
273 	irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR);  in aic5_irq_domain_xlate()
274 	smr = irq_reg_readl(bgc, AT91_AIC5_SMR);  in aic5_irq_domain_xlate()
277 		irq_reg_writel(bgc, intspec[2] | smr, AT91_AIC5_SMR);  in aic5_irq_domain_xlate()
278 	irq_gc_unlock(bgc);  in aic5_irq_domain_xlate()