4017 	u64 maskr; /* right-justified mask */  in qib_7322_get_ib_cfg()  local
4039 		maskr = SYM_RMASK(IBCCtrlB_0, IB_POLARITY_REV_SUPP);  in qib_7322_get_ib_cfg()
4044 		maskr = SYM_RMASK(IBCCtrlB_0, IB_LANE_REV_SUPPORTED);  in qib_7322_get_ib_cfg()
4083 		maskr = IBA7322_IBC_HRTBT_RMASK; /* OR of AUTO and ENB */  in qib_7322_get_ib_cfg()
4103 	ret = (int)((ppd->cpspec->ibcctrl_b >> lsb) & maskr);  in qib_7322_get_ib_cfg()
4119 	u64 maskr; /* right-justified mask */  in qib_7322_set_ib_cfg()  local
4131 		maskr = IBA7322_IBC_DLIDLMC_MASK;  in qib_7322_set_ib_cfg()
4154 		maskr = SYM_RMASK(IBCCtrlB_0, IB_NUM_CHANNELS);  in qib_7322_set_ib_cfg()
4168 		maskr = IBA7322_IBC_SPEED_MASK | IBA7322_IBC_IBTA_1_2_MASK |  in qib_7322_set_ib_cfg()
4185 		maskr = SYM_RMASK(IBCCtrlB_0, IB_POLARITY_REV_SUPP);  in qib_7322_set_ib_cfg()
4190 		maskr = SYM_RMASK(IBCCtrlB_0, IB_LANE_REV_SUPPORTED);  in qib_7322_set_ib_cfg()
4194 		maskr = SYM_FIELD(ppd->cpspec->ibcctrl_a, IBCCtrlA_0,  in qib_7322_set_ib_cfg()
4196 		if (maskr != val) {  in qib_7322_set_ib_cfg()
4208 		maskr = SYM_FIELD(ppd->cpspec->ibcctrl_a, IBCCtrlA_0,  in qib_7322_set_ib_cfg()
4210 		if (maskr != val) {  in qib_7322_set_ib_cfg()
4222 		maskr = (u64) ppd->pkeys[0] | ((u64) ppd->pkeys[1] << 16) |  in qib_7322_set_ib_cfg()
4225 		qib_write_kreg_port(ppd, krp_partitionkey, maskr);  in qib_7322_set_ib_cfg()
4348 		maskr = IBA7322_IBC_HRTBT_RMASK; /* OR of AUTO and ENB */  in qib_7322_set_ib_cfg()
4363 	ppd->cpspec->ibcctrl_b &= ~(maskr << lsb);  in qib_7322_set_ib_cfg()
4364 	ppd->cpspec->ibcctrl_b |= (((u64) val & maskr) << lsb);  in qib_7322_set_ib_cfg()