Lines Matching refs:MLX5_CAP_GEN
71 switch (MLX5_CAP_GEN(dev->mdev, port_type)) { in mlx5_ib_port_link_layer()
140 *max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, in mlx5_query_max_pkeys()
215 u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); in mlx5_ib_query_device()
242 if (MLX5_CAP_GEN(mdev, pkv)) in mlx5_ib_query_device()
244 if (MLX5_CAP_GEN(mdev, qkv)) in mlx5_ib_query_device()
246 if (MLX5_CAP_GEN(mdev, apm)) in mlx5_ib_query_device()
248 if (MLX5_CAP_GEN(mdev, xrc)) in mlx5_ib_query_device()
251 if (MLX5_CAP_GEN(mdev, sho)) { in mlx5_ib_query_device()
260 if (MLX5_CAP_GEN(mdev, block_lb_mc)) in mlx5_ib_query_device()
268 props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp); in mlx5_ib_query_device()
269 props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); in mlx5_ib_query_device()
270 max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / in mlx5_ib_query_device()
272 max_sq_sg = (MLX5_CAP_GEN(mdev, max_wqe_sz_sq) - in mlx5_ib_query_device()
277 props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); in mlx5_ib_query_device()
278 props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1; in mlx5_ib_query_device()
279 props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); in mlx5_ib_query_device()
280 props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd); in mlx5_ib_query_device()
281 props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp); in mlx5_ib_query_device()
282 props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp); in mlx5_ib_query_device()
283 props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq); in mlx5_ib_query_device()
284 props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1; in mlx5_ib_query_device()
285 props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay); in mlx5_ib_query_device()
291 props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg); in mlx5_ib_query_device()
292 props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg); in mlx5_ib_query_device()
298 if (MLX5_CAP_GEN(mdev, pg)) in mlx5_ib_query_device()
433 props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size)); in mlx5_query_hca_port()
434 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); in mlx5_query_hca_port()
435 props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size)); in mlx5_query_hca_port()
628 resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp); in mlx5_ib_alloc_ucontext()
629 resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size); in mlx5_ib_alloc_ucontext()
631 resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq); in mlx5_ib_alloc_ucontext()
632 resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq); in mlx5_ib_alloc_ucontext()
633 resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); in mlx5_ib_alloc_ucontext()
634 resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); in mlx5_ib_alloc_ucontext()
635 resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); in mlx5_ib_alloc_ucontext()
685 resp.num_ports = MLX5_CAP_GEN(dev->mdev, num_ports); in mlx5_ib_alloc_ucontext()
1010 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) in get_ext_port_caps()
1036 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) { in get_port_caps()
1332 if (MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) in mlx5_ib_add()
1356 dev->num_ports = MLX5_CAP_GEN(mdev, num_ports); in mlx5_ib_add()
1434 if (MLX5_CAP_GEN(mdev, xrc)) { in mlx5_ib_add()