Lines Matching refs:pri_path
1461 context->pri_path.sched_queue = MLX4_IB_DEFAULT_SCHED_QUEUE | ((qp->port - 1) << 6); in handle_eth_ud_smac_index()
1468 context->pri_path.grh_mylmc = 0x80 | (u8) smac_index; in handle_eth_ud_smac_index()
1604 mlx4_set_sched(&context->pri_path, attr->port_num); in __mlx4_ib_modify_qp()
1620 context->pri_path.counter_index = counter_index; in __mlx4_ib_modify_qp()
1623 context->pri_path.fl |= in __mlx4_ib_modify_qp()
1625 context->pri_path.vlan_control |= in __mlx4_ib_modify_qp()
1629 context->pri_path.counter_index = in __mlx4_ib_modify_qp()
1640 context->pri_path.disable_pkey_check = 0x40; in __mlx4_ib_modify_qp()
1641 context->pri_path.pkey_index = attr->pkey_index; in __mlx4_ib_modify_qp()
1671 if (mlx4_set_path(dev, attr, attr_mask, qp, &context->pri_path, in __mlx4_ib_modify_qp()
1680 context->pri_path.ackto |= attr->timeout << 3; in __mlx4_ib_modify_qp()
1788 context->pri_path.sched_queue = (qp->port - 1) << 6; in __mlx4_ib_modify_qp()
1792 context->pri_path.sched_queue |= MLX4_IB_DEFAULT_QP0_SCHED_QUEUE; in __mlx4_ib_modify_qp()
1794 context->pri_path.fl = 0x80; in __mlx4_ib_modify_qp()
1797 context->pri_path.fl = 0x80; in __mlx4_ib_modify_qp()
1798 context->pri_path.sched_queue |= MLX4_IB_DEFAULT_SCHED_QUEUE; in __mlx4_ib_modify_qp()
1804 context->pri_path.feup = 1 << 7; /* don't fsm */ in __mlx4_ib_modify_qp()
1821 context->pri_path.ackto = (context->pri_path.ackto & 0xf8) | in __mlx4_ib_modify_qp()
1835 context->pri_path.ackto = MLX4_IB_LINK_TYPE_ETH; in __mlx4_ib_modify_qp()
3266 to_ib_ah_attr(dev, &qp_attr->ah_attr, &context.pri_path); in mlx4_ib_query_qp()
3272 qp_attr->pkey_index = context.pri_path.pkey_index & 0x7f; in mlx4_ib_query_qp()
3276 qp_attr->port_num = context.pri_path.sched_queue & 0x40 ? 2 : 1; in mlx4_ib_query_qp()
3287 qp_attr->timeout = context.pri_path.ackto >> 3; in mlx4_ib_query_qp()