115 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_write_unlocked()  local
117 	st->data[0].d32 = cpu_to_be32((reg << 16) | val);  in ad5755_write_unlocked()
119 	return spi_write(st->spi, &st->data[0].d8[1], 3);  in ad5755_write_unlocked()
155 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_read()  local
159 			.tx_buf = &st->data[0].d8[1],  in ad5755_read()
163 			.tx_buf = &st->data[1].d8[1],  in ad5755_read()
164 			.rx_buf = &st->data[1].d8[1],  in ad5755_read()
171 	st->data[0].d32 = cpu_to_be32(AD5755_READ_FLAG | (addr << 16));  in ad5755_read()
172 	st->data[1].d32 = cpu_to_be32(AD5755_NOOP);  in ad5755_read()
174 	ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));  in ad5755_read()
176 		ret = be32_to_cpu(st->data[1].d32) & 0xffff;  in ad5755_read()
186 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_update_dac_ctrl()  local
189 	st->ctrl[channel] |= set;  in ad5755_update_dac_ctrl()
190 	st->ctrl[channel] &= ~clr;  in ad5755_update_dac_ctrl()
193 		AD5755_CTRL_REG_DAC, st->ctrl[channel]);  in ad5755_update_dac_ctrl()
201 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_set_channel_pwr_down()  local
206 	if ((bool)(st->pwr_down & mask) == pwr_down)  in ad5755_set_channel_pwr_down()
210 		st->pwr_down &= ~mask;  in ad5755_set_channel_pwr_down()
217 		st->pwr_down |= mask;  in ad5755_set_channel_pwr_down()
239 static void ad5755_get_min_max(struct ad5755_state *st,  in ad5755_get_min_max()  argument
242 	enum ad5755_mode mode = st->ctrl[chan->channel] & 7;  in ad5755_get_min_max()
247 static inline int ad5755_get_offset(struct ad5755_state *st,  in ad5755_get_offset()  argument
252 	ad5755_get_min_max(st, chan, &min, &max);  in ad5755_get_offset()
256 static int ad5755_chan_reg_info(struct ad5755_state *st,  in ad5755_chan_reg_info()  argument
274 		*shift = st->chip_info->calib_shift;  in ad5755_chan_reg_info()
282 		*shift = st->chip_info->calib_shift;  in ad5755_chan_reg_info()
295 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_read_raw()  local
302 		ad5755_get_min_max(st, chan, &min, &max);  in ad5755_read_raw()
307 		*val = ad5755_get_offset(st, chan);  in ad5755_read_raw()
310 		ret = ad5755_chan_reg_info(st, chan, info, false,  in ad5755_read_raw()
330 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_write_raw()  local
334 	ret = ad5755_chan_reg_info(st, chan, info, true,  in ad5755_write_raw()
351 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_read_powerdown()  local
354 		       (bool)(st->pwr_down & (1 << chan->channel)));  in ad5755_read_powerdown()
427 static bool ad5755_is_valid_mode(struct ad5755_state *st, enum ad5755_mode mode)  in ad5755_is_valid_mode()  argument
434 		return st->chip_info->has_voltage_out;  in ad5755_is_valid_mode()
447 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_setup_pdata()  local
482 		if (!ad5755_is_valid_mode(st, pdata->dac[i].mode))  in ad5755_setup_pdata()
516 	struct ad5755_state *st = iio_priv(indio_dev);  in ad5755_init_channels()  local
517 	struct iio_chan_spec *channels = st->channels;  in ad5755_init_channels()
521 		channels[i] = st->chip_info->channel_template;  in ad5755_init_channels()
564 	struct ad5755_state *st;  in ad5755_probe()  local
567 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));  in ad5755_probe()
573 	st = iio_priv(indio_dev);  in ad5755_probe()
576 	st->chip_info = &ad5755_chip_info_tbl[type];  in ad5755_probe()
577 	st->spi = spi;  in ad5755_probe()
578 	st->pwr_down = 0xf;  in ad5755_probe()