120 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_read_event_config()  local
122 	return (bool)(xadc->alarm_mask & xadc_get_alarm_mask(chan));  in xadc_read_event_config()
130 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_write_event_config()  local
134 	mutex_lock(&xadc->mutex);  in xadc_write_event_config()
137 		xadc->alarm_mask |= alarm;  in xadc_write_event_config()
139 		xadc->alarm_mask &= ~alarm;  in xadc_write_event_config()
141 	xadc->ops->update_alarm(xadc, xadc->alarm_mask);  in xadc_write_event_config()
143 	ret = _xadc_read_adc_reg(xadc, XADC_REG_CONF1, &cfg);  in xadc_write_event_config()
149 	cfg &= ~((xadc->alarm_mask & 0xf0) << 4); /* bram, pint, paux, ddr */  in xadc_write_event_config()
150 	cfg &= ~((xadc->alarm_mask & 0x08) >> 3); /* ot */  in xadc_write_event_config()
151 	cfg &= ~((xadc->alarm_mask & 0x07) << 1); /* temp, vccint, vccaux */  in xadc_write_event_config()
153 		ret = _xadc_write_adc_reg(xadc, XADC_REG_CONF1, cfg);  in xadc_write_event_config()
156 	mutex_unlock(&xadc->mutex);  in xadc_write_event_config()
170 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_read_event_value()  local
174 		*val = xadc->threshold[offset];  in xadc_read_event_value()
177 		*val = xadc->temp_hysteresis;  in xadc_read_event_value()
194 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_write_event_value()  local
202 	mutex_lock(&xadc->mutex);  in xadc_write_event_value()
206 		xadc->threshold[offset] = val;  in xadc_write_event_value()
209 		xadc->temp_hysteresis = val;  in xadc_write_event_value()
212 		mutex_unlock(&xadc->mutex);  in xadc_write_event_value()
230 		if (xadc->threshold[offset] < xadc->temp_hysteresis)  in xadc_write_event_value()
231 			xadc->threshold[offset + 4] = 0;  in xadc_write_event_value()
233 			xadc->threshold[offset + 4] = xadc->threshold[offset] -  in xadc_write_event_value()
234 					xadc->temp_hysteresis;  in xadc_write_event_value()
235 		ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset + 4),  in xadc_write_event_value()
236 			xadc->threshold[offset + 4]);  in xadc_write_event_value()
242 		ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset), val);  in xadc_write_event_value()
245 	mutex_unlock(&xadc->mutex);  in xadc_write_event_value()