147 		writew(0, i2c_dev->base + REG_CDR);  in wmt_i2c_write()
149 		writew(pmsg->buf[0] & 0xFF, i2c_dev->base + REG_CDR);  in wmt_i2c_write()
155 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
159 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
171 	writew(tcr_val, i2c_dev->base + REG_TCR);  in wmt_i2c_write()
176 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
200 			writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
206 				writew(CR_ENABLE, i2c_dev->base + REG_CR);  in wmt_i2c_write()
208 			writew(pmsg->buf[xfer_len] & 0xFF, i2c_dev->base +  in wmt_i2c_write()
210 			writew(CR_CPU_RDY | CR_ENABLE, i2c_dev->base + REG_CR);  in wmt_i2c_write()
234 	writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
238 	writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
243 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
249 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
261 	writew(tcr_val, i2c_dev->base + REG_TCR);  in wmt_i2c_read()
266 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
286 			writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
290 			writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
334 	writew(i2c_dev->cmd_status, i2c_dev->base + REG_ISR);  in wmt_i2c_isr()
358 	writew(0, i2c_dev->base + REG_CR);  in wmt_i2c_reset_hardware()
359 	writew(MCR_APB_166M, i2c_dev->base + REG_MCR);  in wmt_i2c_reset_hardware()
360 	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);  in wmt_i2c_reset_hardware()
361 	writew(IMR_ENABLE_ALL, i2c_dev->base + REG_IMR);  in wmt_i2c_reset_hardware()
362 	writew(CR_ENABLE, i2c_dev->base + REG_CR);  in wmt_i2c_reset_hardware()
364 	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);  in wmt_i2c_reset_hardware()
367 		writew(SCL_TIMEOUT(128) | TR_STD, i2c_dev->base + REG_TR);  in wmt_i2c_reset_hardware()
369 		writew(SCL_TIMEOUT(128) | TR_HS, i2c_dev->base + REG_TR);  in wmt_i2c_reset_hardware()
450 	writew(0, i2c_dev->base + REG_IMR);  in wmt_i2c_remove()