Lines Matching refs:reg_base
126 void __iomem *reg_base; member
207 writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL); in mv64xxx_i2c_hw_init()
208 writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_TIMING); in mv64xxx_i2c_hw_init()
209 writel(0, drv_data->reg_base + in mv64xxx_i2c_hw_init()
211 writel(0, drv_data->reg_base + in mv64xxx_i2c_hw_init()
215 writel(0, drv_data->reg_base + drv_data->reg_offsets.soft_reset); in mv64xxx_i2c_hw_init()
217 drv_data->reg_base + drv_data->reg_offsets.clock); in mv64xxx_i2c_hw_init()
218 writel(0, drv_data->reg_base + drv_data->reg_offsets.addr); in mv64xxx_i2c_hw_init()
219 writel(0, drv_data->reg_base + drv_data->reg_offsets.ext_addr); in mv64xxx_i2c_hw_init()
221 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_hw_init()
343 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_send_start()
371 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
376 drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
378 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
383 drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
385 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
390 drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
392 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
397 readl(drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
399 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
404 readl(drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
407 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
426 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
439 buf[0] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_LO); in mv64xxx_i2c_read_offload_rx_data()
440 buf[1] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_HI); in mv64xxx_i2c_read_offload_rx_data()
450 cause = readl(drv_data->reg_base + in mv64xxx_i2c_intr_offload()
455 status = readl(drv_data->reg_base + in mv64xxx_i2c_intr_offload()
487 writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL); in mv64xxx_i2c_intr_offload()
488 writel(0, drv_data->reg_base + in mv64xxx_i2c_intr_offload()
510 while (readl(drv_data->reg_base + drv_data->reg_offsets.control) & in mv64xxx_i2c_intr()
512 status = readl(drv_data->reg_base + drv_data->reg_offsets.status); in mv64xxx_i2c_intr()
518 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_intr()
599 writel(buf[0], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO); in mv64xxx_i2c_prepare_tx()
600 writel(buf[1], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI); in mv64xxx_i2c_prepare_tx()
654 writel(ctrl_reg, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL); in mv64xxx_i2c_offload_xfer()
900 drv_data->reg_base = devm_ioremap_resource(&pd->dev, r); in mv64xxx_i2c_probe()
901 if (IS_ERR(drv_data->reg_base)) in mv64xxx_i2c_probe()
902 return PTR_ERR(drv_data->reg_base); in mv64xxx_i2c_probe()